Stefan Reinauer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55629?usp=email )
Change subject: security/intel/stm: Make sure stm_resource_heap is consistent ......................................................................
security/intel/stm: Make sure stm_resource_heap is consistent
When a parallel SMM relocation is being done, there is a good chance that the value for stm_resource_heap is not consistent across processors. Rather than holding (via a lock) processors until this value is set and then flushing the cache so that all processors see the same value, this solution moves the code such that all processors set it, thus maintaining parallelism and keeping the code simple.
Change-Id: I2e5385c47124adcd99803337167984b6307af860 Signed-off-by: Eugene Myers edmyers@tycho.nsa.gov Reviewed-on: https://review.coreboot.org/c/coreboot/+/55629 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org --- M src/security/intel/stm/StmPlatformSmm.c 1 file changed, 5 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved
diff --git a/src/security/intel/stm/StmPlatformSmm.c b/src/security/intel/stm/StmPlatformSmm.c index 248ccc0..3f29afc 100644 --- a/src/security/intel/stm/StmPlatformSmm.c +++ b/src/security/intel/stm/StmPlatformSmm.c @@ -173,12 +173,15 @@ return; }
+ // This code moved here because paralled SMM setup can cause some + // processors to get a bad value. + addr_calc = mseg - CONFIG_BIOS_RESOURCE_LIST_SIZE; + stm_resource_heap = (uint8_t *) addr_calc; + if (cpu == 0) {
// need to create the BIOS resource list once // first calculate the location in SMRAM - addr_calc = mseg - CONFIG_BIOS_RESOURCE_LIST_SIZE; - stm_resource_heap = (uint8_t *) addr_calc; printk(BIOS_DEBUG, "STM: stm_resource_heap located at %p\n", stm_resource_heap); //setup the the list