Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34149 )
Change subject: intel/e7505,i82801dx: Fix SMM_ASEG lock ......................................................................
Patch Set 5:
(1 comment)
Patch Set 5:
(4 comments)
Because this change has been merged, votes may not be decreased.
...
Sorry about that. You get your revenge when I transform this to TSEG :)
https://review.coreboot.org/c/coreboot/+/34149/4/src/southbridge/intel/i8280... File src/southbridge/intel/i82801dx/smi.c:
https://review.coreboot.org/c/coreboot/+/34149/4/src/southbridge/intel/i8280... PS4, Line 322:
How does the next line work without D_OPEN ond SMRAME?
Original code wrote completely wrong 0x90 and SMIs still worked. The register now switched to correct 0x9D.
Before G_SMRAME is set, chipset seems to treat it just as normal memory. Only after G_SMRAME is set the conditional redirection to MMIO comes into play.
-
Kyösti Mälkki (Code Review)