Jamie Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38676 )
Change subject: mb/google/puff: Enable HECI communication ......................................................................
mb/google/puff: Enable HECI communication
Set HeciEnabled = 1 on puff device tree to turn on Intel ME communication interface.
BUG=b:143232330 BRANCH=None TEST=Build puff and boot up OS. ran lspci and confirmed there is a HECI device. 00:16.0 Communication controller: Intel Corporation Device 02e0
Change-Id: I2debb885022ae31e395869d014a91824b5dd980c Signed-off-by: Jamie Chen jamie.chen@intel.com --- M src/mainboard/google/hatch/variants/puff/overridetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/38676/1
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index d84b369..4ffbfed 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -1,4 +1,6 @@ chip soc/intel/cannonlake + # Enable heci communication + register "HeciEnabled" = "1"
register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoDisabled,
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38676 )
Change subject: mb/google/puff: Enable HECI communication ......................................................................
Patch Set 1: Code-Review+2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38676 )
Change subject: mb/google/puff: Enable HECI communication ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38676 )
Change subject: mb/google/puff: Enable HECI communication ......................................................................
mb/google/puff: Enable HECI communication
Set HeciEnabled = 1 on puff device tree to turn on Intel ME communication interface.
BUG=b:143232330 BRANCH=None TEST=Build puff and boot up OS. ran lspci and confirmed there is a HECI device. 00:16.0 Communication controller: Intel Corporation Device 02e0
Change-Id: I2debb885022ae31e395869d014a91824b5dd980c Signed-off-by: Jamie Chen jamie.chen@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38676 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Duncan Laurie dlaurie@chromium.org Reviewed-by: Edward O'Callaghan quasisec@chromium.org --- M src/mainboard/google/hatch/variants/puff/overridetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index d84b369..4ffbfed 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -1,4 +1,6 @@ chip soc/intel/cannonlake + # Enable heci communication + register "HeciEnabled" = "1"
register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoDisabled,
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Duncan Laurie (Code Review) -
Edward O'Callaghan (Code Review)
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Jamie Chen (Code Review)
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Patrick Georgi (Code Review)