[S] Change in coreboot[master]: soc/intel/Meteorlake: Set Power Performance Platform Override

[Subrata Banik (Code Review)]

Attention is currently required from: Tarun Tuli, Kapil Porwal.

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74155 )

Change subject: soc/intel/Meteorlake: Set Power Performance Platform Override
......................................................................

soc/intel/Meteorlake: Set Power Performance Platform Override

According to document 619503 MTL EDS Vol2, bit 18 of MSR_POWER_CTL
must be set.

This patch is backported from
commit hash 117770d32468e63df37aee1c041b5dc7cc1d56d2 (soc/intel/
alderlake: Enable Energy/Performance Bias control).

Signed-off-by: Subrata Banik 
Change-Id: Ic83225b619c49db0b49b521a83a2f1dc1ad69be8
---
M src/soc/intel/meteorlake/cpu.c
1 file changed, 19 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/74155/1

diff --git a/src/soc/intel/meteorlake/cpu.c b/src/soc/intel/meteorlake/cpu.c
index 62639a1..691f50d 100644
--- a/src/soc/intel/meteorlake/cpu.c
+++ b/src/soc/intel/meteorlake/cpu.c
@@ -72,10 +72,11 @@
    msr.hi = 0;
    wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr);

-	/* Enable PROCHOT */
+	/* Enable PROCHOT and Power Performance Platform Override */
    msr = rdmsr(MSR_POWER_CTL);
    msr.lo |= (1 << 0);	/* Enable Bi-directional PROCHOT as an input*/
    msr.lo |= (1 << 23);	/* Lock it */
+	msr.lo |= (1 << 18);	/* Power Performance Platform Override */
    wrmsr(MSR_POWER_CTL, msr);
 }