Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Paul Menzel, Subrata Banik.
Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email )
Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table ......................................................................
Patch Set 10:
(4 comments)
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/84103/comment/d385bb9d_39a02f4a?usp... : PS7, Line 121: if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_USE_GPE1)) {
Subrata, […]
sure. agree.
File src/soc/intel/common/block/include/intelblocks/pmclib.h:
https://review.coreboot.org/c/coreboot/+/84103/comment/3f05ab99_569628c6?usp... : PS10, Line 132: platforms
u can specify from which SoC?
Done
https://review.coreboot.org/c/coreboot/+/84103/comment/5adf3e97_08b126bb?usp... : PS10, Line 134: SOD
SoC?
Done
https://review.coreboot.org/c/coreboot/+/84103/comment/acbdec2c_b5e67852?usp... : PS10, Line 138: : #if !CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1) : #define GPE1_STS(x) (0x0 + ((x) * 4)) : #define GPE1_REG_MAX 0 : #endif
please move the macros at line #9
Done