build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28289 )
Change subject: util/msrtool: Fix typo ......................................................................
Patch Set 1:
(19 comments)
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_atom.c File util/msrtool/intel_atom.c:
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_atom.c@800 PS1, Line 800: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_atom.c@802 PS1, Line 802: occurring across all logical processors sharing a processor core" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_atom.c@823 PS1, Line 823: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_atom.c@825 PS1, Line 825: occurring across all logical processors sharing a processor core" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_atom.c@846 PS1, Line 846: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_atom.c@848 PS1, Line 848: occurring across all logical processors sharing a processor core" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_core2_later.c File util/msrtool/intel_core2_later.c:
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_core2_later.c@824 PS1, Line 824: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_core2_later.c@826 PS1, Line 826: occurring across all logical processors sharing a processor core" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_core2_later.c@847 PS1, Line 847: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_core2_later.c@849 PS1, Line 849: occurring across all logical processors sharing a processor core" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_core2_later.c@870 PS1, Line 870: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_core2_later.c@872 PS1, Line 872: occurring across all logical processors sharing a processor core" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_nehalem.c File util/msrtool/intel_nehalem.c:
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_nehalem.c@1112 PS1, Line 1112: { MSR1(1), "CPU switch to the Minimum Enhanced Intel \ Avoid line continuations in quoted strings
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_nehalem.c@1376 PS1, Line 1376: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_nehalem.c@1378 PS1, Line 1378: occurring across all logical processors sharing a processor core" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_nehalem.c@1399 PS1, Line 1399: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_nehalem.c@1401 PS1, Line 1401: occurring across all logical processors sharing a processor core" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_nehalem.c@1422 PS1, Line 1422: conditions occurring in the logical processor which programmed the MSR" }, line over 80 characters
https://review.coreboot.org/#/c/28289/1/util/msrtool/intel_nehalem.c@1424 PS1, Line 1424: occurring across all logical processors sharing a processor core" }, line over 80 characters