Change in coreboot[master]: soc/intel/alderlake: Implement PMC static function lock

[Subrata Banik (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63689 )

Change subject: soc/intel/alderlake: Implement PMC static function lock
......................................................................

soc/intel/alderlake: Implement PMC static function lock

This patch implements API to perform static function lockdown and
call `pmc_st_pg_lock()` from `pmc_lockdown_cfg()`.

BUG=b:211954778
TEST=Able to build and boot google/redrix to OS. Verified PMC static PG
lock (bit 31) is set.
> iotools mmio_read32 0xfe001e20

0x80000000

Signed-off-by: Subrata Banik 
Change-Id: I68343f9af4f34aceae06293c5f87c5eaa3430a60
---
M src/soc/intel/alderlake/include/soc/pmc.h
M src/soc/intel/alderlake/lockdown.c
2 files changed, 13 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/63689/1

diff --git a/src/soc/intel/alderlake/include/soc/pmc.h b/src/soc/intel/alderlake/include/soc/pmc.h
index 52cc0b5..ca11ae9 100644
--- a/src/soc/intel/alderlake/include/soc/pmc.h
+++ b/src/soc/intel/alderlake/include/soc/pmc.h
@@ -142,6 +142,9 @@
 #define   ACPI_EN			(1 << 7)
 #define   SCI_IRQ_SEL			(7 << 0)

+#define ST_PG_FDIS1			0x1e20
+#define   ST_FDIS_LOCK			(1 << 31)
+
 #define  SCIS_IRQ9			0
 #define  SCIS_IRQ10			1
 #define  SCIS_IRQ11			2
diff --git a/src/soc/intel/alderlake/lockdown.c b/src/soc/intel/alderlake/lockdown.c
index e9e4b59..f7b2f3c 100644
--- a/src/soc/intel/alderlake/lockdown.c
+++ b/src/soc/intel/alderlake/lockdown.c
@@ -48,6 +48,13 @@
    write8(pmcbase + GEN_PMCON_B, reg8);
 }

+static void pmc_st_pg_lock(void)
+{
+	void *pmcbase = pmc_mmio_regs();
+
+	setbits32(pmcbase + ST_PG_FDIS1, ST_FDIS_LOCK);
+}
+
 static void pmc_lockdown_cfg(int chipset_lockdown)
 {
    /* PMSYNC */
@@ -57,6 +64,9 @@

if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT)
    	pmc_lock_smi();
+
+	if (!CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM))
+		pmc_st_pg_lock();
 }

void soc_lockdown_config(int chipset_lockdown)