Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31125
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
siemens/mc_apl2: Activate TPM support
TEST=Build coreboot for mc_apl2 board and check the TPM console output.
Change-Id: I2b0d5a6f2c230187857c2428a70de61f21da6724 Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c 3 files changed, 19 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/31125/1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig index 393f9c6..4e4a928 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig @@ -6,5 +6,8 @@ select DRIVER_INTEL_I210 select DRIVERS_I2C_RX6110SA select DRIVER_SIEMENS_NC_FPGA + select MAINBOARD_HAS_TPM2 + select MAINBOARD_HAS_LPC_TPM + select TPM_ON_FAST_SPI
endif # BOARD_SIEMENS_MC_APL2 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index 42c4310..c362e6c 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -5,7 +5,6 @@ end
register "sci_irq" = "SCIS_IRQ10" - register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Disable all clkreq of PCIe root ports as SMARC interface do not # have this pins. @@ -84,17 +83,17 @@ device i2c 0x32 on end # RTC RX6110 SA end end - device pci 16.1 on end # - I2C 1 - device pci 16.2 on end # - I2C 2 - device pci 16.3 on end # - I2C 3 - device pci 17.0 on end # - I2C 4 - device pci 17.1 on end # - I2C 5 - device pci 17.2 on end # - I2C 6 + device pci 16.1 on end # - I2C 1 + device pci 16.2 on end # - I2C 2 + device pci 16.3 on end # - I2C 3 + device pci 17.0 on end # - I2C 4 + device pci 17.1 on end # - I2C 5 + device pci 17.2 on end # - I2C 6 device pci 17.3 on end # - I2C 7 - device pci 18.0 on end # - UART 0 - device pci 18.1 on end # - UART 1 - device pci 18.2 on end # - UART 2 - device pci 18.3 on end # - UART 3 + device pci 18.0 on end # - UART 0 + device pci 18.1 on end # - UART 1 + device pci 18.2 on end # - UART 2 + device pci 18.3 on end # - UART 3 device pci 19.0 off end # - SPI 0 device pci 19.1 off end # - SPI 1 device pci 19.2 off end # - SPI 2 @@ -104,6 +103,11 @@ device pci 1d.0 off end # - UFS device pci 1e.0 off end # - SDIO device pci 1f.0 on end # - LPC + device pci 1f.0 on # - LPC + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end device pci 1f.1 on end # - SMBUS end end diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c index a54dae5..d12e106 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c @@ -364,7 +364,7 @@ /* SIO_SPI_FS0_1V8 - Connected to ESPI_CS0# of SMARC connector. */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_105, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_FS1_1V8 - Connected to ESPI_CS1# of SMARC connector. */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, UP_20K, DEEP, NF1, HIZCRx0, ENPD), + PAD_CFG_NF(GPIO_106, NATIVE, DEEP, NF3), /* FST_SPI_CS2_N */ /* SIO_SPI_MISO_1V8 - Connected to ESPI_IO_0 of SMARC connector. */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_109, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_MOSI_1V8 - Connected to ESPI_IO_1 of SMARC connector. */
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 1: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/#/c/31125/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31125/1//COMMIT_MSG@8 PS1, Line 8: Please elaborate why the GPIO needed to be changed.
https://review.coreboot.org/#/c/31125/1//COMMIT_MSG@9 PS1, Line 9: TEST=Build coreboot for mc_apl2 board and check the TPM console output. What command did you use, to check functionality under the OS like GNU/Linux?
https://review.coreboot.org/#/c/31125/1/src/mainboard/siemens/mc_apl1/varian... File src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb:
https://review.coreboot.org/#/c/31125/1/src/mainboard/siemens/mc_apl1/varian... PS1, Line 86: device pci 16.1 on end # - I2C 1 : device pci 16.2 on end # - I2C 2 : device pci 16.3 on end # - I2C 3 : device pci 17.0 on end # - I2C 4 : device pci 17.1 on end # - I2C 5 : device pci 17.2 on end # - I2C 6 : device pci 17.3 on end # - I2C 7 : device pci 18.0 on end # - UART 0 : device pci 18.1 on end # - UART 1 : device pci 18.2 on end # - UART 2 : device pci 18.3 on end # - UART 3 This should be done in a separate commit.
Hello Werner Zeh, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31125
to look at the new patch set (#2).
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
siemens/mc_apl2: Activate TPM support
The TPM chip is connected to the SPI interface of APL. The proper chip select pin needs to be used in order to access the TPM in the memory mapped space. This needed chip select is internally (inside APL) routable to GPIO 106. Therefore the change of GPIO 106 mode is needed to make the TPM work on SPI bus.
TEST=Build coreboot for mc_apl2 board and check the TPM console output. In addition the TPM was correctly verified by our Linux driver.
Change-Id: I2b0d5a6f2c230187857c2428a70de61f21da6724 Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c 3 files changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/31125/2
Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/#/c/31125/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31125/1//COMMIT_MSG@8 PS1, Line 8:
Please elaborate why the GPIO needed to be changed.
Done
https://review.coreboot.org/#/c/31125/1//COMMIT_MSG@9 PS1, Line 9: TEST=Build coreboot for mc_apl2 board and check the TPM console output.
What command did you use, to check functionality under the OS like GNU/Linux?
Done
https://review.coreboot.org/#/c/31125/1/src/mainboard/siemens/mc_apl1/varian... File src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb:
https://review.coreboot.org/#/c/31125/1/src/mainboard/siemens/mc_apl1/varian... PS1, Line 86: device pci 16.1 on end # - I2C 1 : device pci 16.2 on end # - I2C 2 : device pci 16.3 on end # - I2C 3 : device pci 17.0 on end # - I2C 4 : device pci 17.1 on end # - I2C 5 : device pci 17.2 on end # - I2C 6 : device pci 17.3 on end # - I2C 7 : device pci 18.0 on end # - UART 0 : device pci 18.1 on end # - UART 1 : device pci 18.2 on end # - UART 2 : device pci 18.3 on end # - UART 3
This should be done in a separate commit.
will correct that in a separate patch
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 2: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 2: Code-Review+1
Thank you for the quick reaction.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 2: Code-Review+2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31125/2/src/mainboard/siemens/mc_apl1/varian... File src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c:
https://review.coreboot.org/#/c/31125/2/src/mainboard/siemens/mc_apl1/varian... PS2, Line 366: /* SIO_SPI_FS1_1V8 - Connected to ESPI_CS1# of SMARC connector. */ Doesn't the comment need an update?
Also, this makes one question the other comments. What's SMARC btw? ;)
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31125/2/src/mainboard/siemens/mc_apl1/varian... File src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c:
https://review.coreboot.org/#/c/31125/2/src/mainboard/siemens/mc_apl1/varian... PS2, Line 366: /* SIO_SPI_FS1_1V8 - Connected to ESPI_CS1# of SMARC connector. */
Doesn't the comment need an update? […]
Yes, the comment needs an update. Regarding SMARC: https://en.wikipedia.org/wiki/Smart_Mobility_Architecture
Hello Werner Zeh, Angel Pons, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31125
to look at the new patch set (#3).
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
siemens/mc_apl2: Activate TPM support
The TPM chip is connected to the SPI interface of APL. The proper chip select pin needs to be used in order to access the TPM in the memory mapped space. This needed chip select is internally (inside APL) routable to GPIO 106. Therefore the change of GPIO 106 mode is needed to make the TPM work on SPI bus.
TEST=Build coreboot for mc_apl2 board and check the TPM console output. In addition the TPM was correctly verified by our Linux driver.
Change-Id: I2b0d5a6f2c230187857c2428a70de61f21da6724 Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c 3 files changed, 10 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/31125/3
Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/31125/2/src/mainboard/siemens/mc_apl1/varian... File src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c:
https://review.coreboot.org/#/c/31125/2/src/mainboard/siemens/mc_apl1/varian... PS2, Line 366: /* SIO_SPI_FS1_1V8 - Connected to ESPI_CS1# of SMARC connector. */
Yes, the comment needs an update. […]
Done
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31125 )
Change subject: siemens/mc_apl2: Activate TPM support ......................................................................
siemens/mc_apl2: Activate TPM support
The TPM chip is connected to the SPI interface of APL. The proper chip select pin needs to be used in order to access the TPM in the memory mapped space. This needed chip select is internally (inside APL) routable to GPIO 106. Therefore the change of GPIO 106 mode is needed to make the TPM work on SPI bus.
TEST=Build coreboot for mc_apl2 board and check the TPM console output. In addition the TPM was correctly verified by our Linux driver.
Change-Id: I2b0d5a6f2c230187857c2428a70de61f21da6724 Signed-off-by: Mario Scheithauer mario.scheithauer@siemens.com Reviewed-on: https://review.coreboot.org/c/31125 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c 3 files changed, 10 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig index 393f9c6..4e4a928 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig @@ -6,5 +6,8 @@ select DRIVER_INTEL_I210 select DRIVERS_I2C_RX6110SA select DRIVER_SIEMENS_NC_FPGA + select MAINBOARD_HAS_TPM2 + select MAINBOARD_HAS_LPC_TPM + select TPM_ON_FAST_SPI
endif # BOARD_SIEMENS_MC_APL2 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index 42c4310..d2d5394 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -104,6 +104,11 @@ device pci 1d.0 off end # - UFS device pci 1e.0 off end # - SDIO device pci 1f.0 on end # - LPC + device pci 1f.0 on # - LPC + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end device pci 1f.1 on end # - SMBUS end end diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c index a54dae5..d1ca679 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c @@ -363,8 +363,8 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_104, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_FS0_1V8 - Connected to ESPI_CS0# of SMARC connector. */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_105, DN_20K, DEEP, NF1, HIZCRx0, ENPD), - /* SIO_SPI_FS1_1V8 - Connected to ESPI_CS1# of SMARC connector. */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, UP_20K, DEEP, NF1, HIZCRx0, ENPD), + /* SIO_SPI_FS1_1V8 - Connected to FST_SPI_CS2_N of SMARC connector. */ + PAD_CFG_NF(GPIO_106, NATIVE, DEEP, NF3), /* SIO_SPI_MISO_1V8 - Connected to ESPI_IO_0 of SMARC connector. */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_109, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_MOSI_1V8 - Connected to ESPI_IO_1 of SMARC connector. */
-
Angel Pons (Code Review) -
Mario Scheithauer (Code Review)
-
Nico Huber (Code Review)
-
Patrick Georgi (Code Review)
-
Paul Menzel (Code Review)
-
Werner Zeh (Code Review)