Nico Huber has uploaded this change for review. ( https://review.coreboot.org/29049
Change subject: soc/rockchip/rk3399: Convert to `board_reset()` ......................................................................
soc/rockchip/rk3399: Convert to `board_reset()`
Change-Id: Id07e1c7fbd35393ffafda53fc7a15ec0e157d075 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/google/gru/Kconfig M src/mainboard/google/gru/reset.c M src/soc/rockchip/rk3399/sdram.c 3 files changed, 6 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/29049/1
diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig index 11bf18c..fee2dd0 100644 --- a/src/mainboard/google/gru/Kconfig +++ b/src/mainboard/google/gru/Kconfig @@ -47,7 +47,6 @@ select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_RTC select EC_GOOGLE_CHROMEEC_SPI - select HAVE_HARD_RESET select MAINBOARD_FORCE_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_NATIVE_VGA_INIT diff --git a/src/mainboard/google/gru/reset.c b/src/mainboard/google/gru/reset.c index 0311d58..5bf7260 100644 --- a/src/mainboard/google/gru/reset.c +++ b/src/mainboard/google/gru/reset.c @@ -18,7 +18,7 @@
#include "board.h"
-void do_hard_reset(void) +void do_board_reset(void) { gpio_output(GPIO_RESET, 1); } diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c index 9734679..2b08413 100644 --- a/src/soc/rockchip/rk3399/sdram.c +++ b/src/soc/rockchip/rk3399/sdram.c @@ -990,7 +990,7 @@ if (stopwatch_expired(&sw)) { printk(BIOS_ERR, "index1 frequency change overtime, reset\n"); - hard_reset(); + board_reset(); } }
@@ -1000,7 +1000,7 @@ if (stopwatch_expired(&sw)) { printk(BIOS_ERR, "index1 frequency done overtime, reset\n"); - hard_reset(); + board_reset(); } }
@@ -1009,7 +1009,7 @@ clrsetbits_le32(&denali_phy[896], (0x3 << 8) | 1, 1 << 8); if (data_training(channel, sdram_params, PI_FULL_TRAINING)) { printk(BIOS_ERR, "index1 training failed, reset\n"); - hard_reset(); + board_reset(); } } } @@ -1042,7 +1042,7 @@ */ if (pctl_cfg(channel, sdram_params) != 0) { printk(BIOS_ERR, "pctl_cfg fail, reset\n"); - hard_reset(); + board_reset(); }
/* LPDDR2/LPDDR3 need to wait DAI complete, max 10us */ @@ -1052,7 +1052,7 @@ if (data_training(channel, sdram_params, PI_FULL_TRAINING)) { printk(BIOS_ERR, "SDRAM initialization failed, reset\n"); - hard_reset(); + board_reset(); }
set_ddrconfig(sdram_params, channel,