[XS] Change in coreboot[main]: mb/starlabs/*: Explicitly set Early Command Training

[Sean Rhodes (Code Review)]

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86207?usp=email )

Change subject: mb/starlabs/*: Explicitly set Early Command Training
......................................................................

mb/starlabs/*: Explicitly set Early Command Training

Explicitly set ECT in romstage; enable it for boards that use
LPxxx memory and disable it for boards that use SODIMMs.

Change-Id: I41bd9b221dc97bb4f76862f7095c20f4b8bc6036
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86207
Tested-by: build bot (Jenkins) 
Reviewed-by: Matt DeVillier 
---
M src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
M src/mainboard/starlabs/starbook/variants/adl/romstage.c
M src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
M src/mainboard/starlabs/starbook/variants/cml/romstage.c
M src/mainboard/starlabs/starbook/variants/mtl/romstage.c
M src/mainboard/starlabs/starbook/variants/rpl/romstage.c
M src/mainboard/starlabs/starbook/variants/tgl/romstage.c
7 files changed, 7 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Matt DeVillier: Looks good to me, approved

diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c b/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
index 530246a..5f8ebd6 100644
--- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
+++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c
@@ -9,6 +9,7 @@
 {
    const struct mb_cfg mem_config = {
    	.type = MEM_TYPE_DDR4,
+		.ect = false,
    	.UserBd = BOARD_TYPE_ULT_ULX,
    };

diff --git a/src/mainboard/starlabs/starbook/variants/adl/romstage.c b/src/mainboard/starlabs/starbook/variants/adl/romstage.c
index d31c63e..98683da 100644
--- a/src/mainboard/starlabs/starbook/variants/adl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/adl/romstage.c
@@ -9,6 +9,7 @@
 {
    const struct mb_cfg mem_config = {
    	.type = MEM_TYPE_DDR4,
+		.ect = false,
    	.UserBd = BOARD_TYPE_MOBILE,
    };

diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c b/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
index 2f1d1a2b..21000d1 100644
--- a/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
@@ -9,6 +9,7 @@
 {
    const struct mb_cfg mem_config = {
    	.type = MEM_TYPE_DDR4,
+		.ect = false,
    	.UserBd = BOARD_TYPE_ULT_ULX,
    };

diff --git a/src/mainboard/starlabs/starbook/variants/cml/romstage.c b/src/mainboard/starlabs/starbook/variants/cml/romstage.c
index 372f8b0..648943b 100644
--- a/src/mainboard/starlabs/starbook/variants/cml/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/cml/romstage.c
@@ -66,7 +66,7 @@
    	.rcomp_targets = {100, 40, 20, 20, 26},
    	.dq_pins_interleaved = 0,
    	.vref_ca_config = 2,
-		.ect = 0,
+		.ect = true,
    };

const uint8_t vtd = get_uint_option("vtd", 1);
diff --git a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
index 64b7884..3181865 100644
--- a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c
@@ -9,6 +9,7 @@
 {
    const struct mb_cfg mem_config = {
    	.type = MEM_TYPE_DDR5,
+		.ect = false,
    	.UserBd = BOARD_TYPE_MOBILE,
    };

diff --git a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c
index a4261e7..20d518c 100644
--- a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c
@@ -9,6 +9,7 @@
 {
    const struct mb_cfg mem_config = {
    	.type = MEM_TYPE_DDR4,
+		.ect = false,
    	.UserBd = BOARD_TYPE_MOBILE,
    };

diff --git a/src/mainboard/starlabs/starbook/variants/tgl/romstage.c b/src/mainboard/starlabs/starbook/variants/tgl/romstage.c
index ceeb754..8eb82a5 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/romstage.c
+++ b/src/mainboard/starlabs/starbook/variants/tgl/romstage.c
@@ -9,6 +9,7 @@
 {
    const struct mb_cfg mem_config = {
    	.type = MEM_TYPE_DDR4,
+		.ect = false,
    };

const bool half_populated = false;