Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86597?usp=email )
Change subject: soc/amd/glinda/Makefile.mk: Use relative address for APOB_NV ......................................................................
soc/amd/glinda/Makefile.mk: Use relative address for APOB_NV
amdfwtool is always setting BIOS relative as address_mode for the APOB NV binary. So instead of giving amdfwtool a memory address we should give it a flash relative address.
Change-Id: I4596902ca6c9880217247ce6fe96fcb516aec54d Signed-off-by: Maximilian Brune maximilian.brune@9elements.com --- M src/soc/amd/glinda/Makefile.mk 1 file changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/86597/1
diff --git a/src/soc/amd/glinda/Makefile.mk b/src/soc/amd/glinda/Makefile.mk index 7f48581..29dc87e 100644 --- a/src/soc/amd/glinda/Makefile.mk +++ b/src/soc/amd/glinda/Makefile.mk @@ -124,11 +124,13 @@ PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}') PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
+FMAP_FLASH_START=$(call get_fmap_value,FMAP_SECTION_FLASH_START) ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y) # type = 0x63 - construct APOB NV base/size from flash map # The flashmap section used for this is expected to be named RW_MRC_CACHE APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE) -APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) +APOB_NV_BASE=$(call _tohex,$(call int-subtract, \ + $(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) $(FMAP_FLASH_START))) endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE
ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)