New patch to review for coreboot: soc/intel/apollolake: Add cbmem_top() implementation

[Andrey Petrov]

Andrey Petrov ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13883

-gerrit

commit bf8745d855f40bdb2ec26bbbb13bf5c11895b978
Author: Andrey Petrov 
Date:   Wed Mar 2 15:09:27 2016 -0800

soc/intel/apollolake: Add cbmem_top() implementation

On Apollolake CPU memory mapping is similar to previous SoC, and
    we place CBMEM right under TSEG.

Change-Id: I606f690449ba98af6e9fc3074d677c7287892164
    Signed-off-by: Andrey Petrov 
---
 src/soc/intel/apollolake/Makefile.inc   |  3 +++
 src/soc/intel/apollolake/memmap.c       | 27 +++++++++++++++++++++++++++
 src/soc/intel/apollolake/placeholders.c |  5 -----
 3 files changed, 30 insertions(+), 5 deletions(-)

diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index a95e27c..9bc7fcf 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -19,15 +19,18 @@ bootblock-y += uart_early.c
 romstage-y += placeholders.c
 romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c
 romstage-y += gpio.c
+romstage-y += memmap.c
 romstage-y += mmap_boot.c
 romstage-y += uart_early.c

smm-y += placeholders.c
 ramstage-y += placeholders.c
 ramstage-y += gpio.c
+ramstage-y += memmap.c
 ramstage-y += mmap_boot.c
 ramstage-y += uart_early.c

+
 CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include

endif
diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c
new file mode 100644
index 0000000..8cfb073
--- /dev/null
+++ b/src/soc/intel/apollolake/memmap.c
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Andrey Petrov  for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/io.h>
+#include <cbmem.h>
+#include <device/pci.h>
+#include <soc/northbridge.h>
+#include <soc/pci_devs.h>
+
+static uintptr_t smm_region_start(void)
+{
+	return pci_read_config32(NB_DEV_ROOT, TSEG) & 0xfff00000;
+}
+
+void *cbmem_top(void)
+{
+	return (void *)smm_region_start();
+}
diff --git a/src/soc/intel/apollolake/placeholders.c b/src/soc/intel/apollolake/placeholders.c
index 3a818eb..808bd54 100644
--- a/src/soc/intel/apollolake/placeholders.c
+++ b/src/soc/intel/apollolake/placeholders.c
@@ -3,11 +3,6 @@
 #include <delay.h>
 #include <rules.h>

-void *cbmem_top(void)
-{
-	return NULL;
-}
-
 void southbridge_smi_set_eos(void)
 {
 }