[S] Change in coreboot[master]: soc/nvidia/tegra210: Fix flushing SPI fifo

[Arthur Heymans (Code Review)]

Attention is currently required from: Julius Werner.

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70137 )

Change subject: soc/nvidia/tegra210: Fix flushing SPI fifo
......................................................................

soc/nvidia/tegra210: Fix flushing SPI fifo

This will avoid clearing the other bits in fifo_status.

Change-Id: I7917b3f8d9af6056ed872b7e48cef9c3deba5119
Signed-off-by: Arthur Heymans 
---
M src/soc/nvidia/tegra210/spi.c
1 file changed, 13 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/70137/1

diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c
index 0f38df2..e6f667a 100644
--- a/src/soc/nvidia/tegra210/spi.c
+++ b/src/soc/nvidia/tegra210/spi.c
@@ -331,7 +331,7 @@

uint32_t fifo_status = read32(&spi->regs->fifo_status);
    fifo_status |= flush_mask;
-	write32(&spi->regs->fifo_status, flush_mask);
+	write32(&spi->regs->fifo_status, fifo_status);

while (read32(&spi->regs->fifo_status) & flush_mask)
    	;