Attention is currently required from: Bora Guvendik, Selma Bensaid, Maulik V Vaghela.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52865 )
Change subject: mb/intel/adlrvp_m: Program CPU PCIE RP GPIOs in early GPIO
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52865/comment/0d20c15c_d644ec8f
PS1, Line 9: We need to configure CPU PCIE root port related gpios in early
: boot block stage for CPU root ports to work.
Can you please add the reason why CPU root ports do not work if the pads are configured later on i.e. ramstage?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I27c898943471d834bd82e3c7e8b36cceb12de099
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