[S] Change in coreboot[main]: soc/intel/adl: Handle critical low battery early in romstage

[Subrata Banik (Code Review)]

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Karthik Ramasubramanian, Nick Vaccaro.

Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86227?usp=email )

Change subject: soc/intel/adl: Handle critical low battery early in romstage
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Patch Set 2:

(2 comments)

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/86227/comment/b69bd6f2_fa4de1b8?usp... :
PS1, Line 427: 		google_chromeec_reboot(EC_REBOOT_COLD_AP_OFF,0);
> > `space required after that ',' (ctx:VxV)` […]

Acknowledged

https://review.coreboot.org/c/coreboot/+/86227/comment/22d53e52_2b3b482a?usp... :
PS1, Line 446: is_early_critical_shutdown_needed
> A function start with `is_` is commonly expected to return a boolean and to not take any action. […]

Acknowledged