Hello CK HU,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/46388
to review the following change.
Change subject: mb/google/asurada: Pass reset gpio parameter to BL31 ......................................................................
mb/google/asurada: Pass reset gpio parameter to BL31
To support gpio reset SoC, we need to pass the reset gpio parameter to BL31.
Signed-off-by: CK Hu ck.hu@mediatek.com Change-Id: I2ae7684a61af76693605cc0bcf8d20c8992c7bff --- M src/mainboard/google/asurada/mainboard.c 1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/46388/1
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c index b77b3ba..76a71c7 100644 --- a/src/mainboard/google/asurada/mainboard.c +++ b/src/mainboard/google/asurada/mainboard.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <bl31.h> #include <console/console.h> #include <device/device.h> #include <device/mmio.h> @@ -7,6 +8,10 @@ #include <soc/gpio_common.h> #include <soc/usb.h>
+#include "gpio.h" + +#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h> + static void sdr_set_field(void *addr, u32 field, u32 val) { u32 tv = read32(addr); @@ -16,6 +21,17 @@ write32(addr, tv); }
+static void register_reset_to_bl31(void) +{ + static struct bl_aux_param_gpio param_reset = { + .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO }, + .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH }, + }; + + param_reset.gpio.index = GPIO_RESET.id; + register_bl31_aux_param(¶m_reset.h); +} + static void mainboard_init(struct device *dev) { int i; @@ -59,6 +75,8 @@ sdr_set_field(gpio_base, 0x3fffffff, 0x24924924);
setup_usb_host(); + + register_reset_to_bl31(); }
static void mainboard_enable(struct device *dev)
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46388 )
Change subject: mb/google/asurada: Pass reset gpio parameter to BL31 ......................................................................
Patch Set 3: Code-Review+2
Hello Hung-Te Lin, build bot (Jenkins), CK HU,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46388
to look at the new patch set (#9).
Change subject: mb/google/asurada: Pass reset gpio parameter to BL31 ......................................................................
mb/google/asurada: Pass reset gpio parameter to BL31
To support gpio reset SoC, we need to pass the reset gpio parameter to BL31.
Signed-off-by: CK Hu ck.hu@mediatek.com Change-Id: I2ae7684a61af76693605cc0bcf8d20c8992c7bff --- M src/mainboard/google/asurada/mainboard.c 1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/46388/9
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46388 )
Change subject: mb/google/asurada: Pass reset gpio parameter to BL31 ......................................................................
Patch Set 10: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46388 )
Change subject: mb/google/asurada: Pass reset gpio parameter to BL31 ......................................................................
mb/google/asurada: Pass reset gpio parameter to BL31
To support gpio reset SoC, we need to pass the reset gpio parameter to BL31.
Signed-off-by: CK Hu ck.hu@mediatek.com Change-Id: I2ae7684a61af76693605cc0bcf8d20c8992c7bff Reviewed-on: https://review.coreboot.org/c/coreboot/+/46388 Reviewed-by: Hung-Te Lin hungte@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/asurada/mainboard.c 1 file changed, 18 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c index 7a37df5..8699ede 100644 --- a/src/mainboard/google/asurada/mainboard.c +++ b/src/mainboard/google/asurada/mainboard.c @@ -1,16 +1,32 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <bl31.h> #include <console/console.h> #include <device/device.h> #include <device/mmio.h> #include <soc/gpio.h> #include <soc/usb.h>
+#include "gpio.h" + +#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h> + #define MSDC0_DRV_MASK 0x3fffffff #define MSDC1_DRV_MASK 0x3ffff000 #define MSDC0_DRV_VALUE 0x24924924 #define MSDC1_DRV_VALUE 0x24924000
+static void register_reset_to_bl31(void) +{ + static struct bl_aux_param_gpio param_reset = { + .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO }, + .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH }, + }; + + param_reset.gpio.index = GPIO_RESET.id; + register_bl31_aux_param(¶m_reset.h); +} + static void configure_emmc(void) { void *gpio_base = (void *)IOCFG_TL_BASE; @@ -68,6 +84,8 @@ configure_emmc(); configure_sdcard(); setup_usb_host(); + + register_reset_to_bl31(); }
static void mainboard_enable(struct device *dev)
-
Hung-Te Lin (Code Review) -
Yidi Lin (Code Review)