Change in coreboot[master]: soc/intel/xeon_sp: Set PCIE secure register lock - coreboot-gerrit

15 Apr 2021


      Attention is currently required from: Marc Jones, Jonathan Zhang, Patrick Rudolph.
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52164 )
Change subject: soc/intel/xeon_sp: Set PCIE secure register lock
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Patch Set 1: Code-Review+2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ifa5bfb2824477b76ba34c3dc0588311f6c320092
Gerrit-Change-Number: 52164
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones marc@marcjonesconsulting.com
Gerrit-Reviewer: Jay Talbott JayTalbott@sysproconsulting.com
Gerrit-Reviewer: Jonathan Zhang jonzhang@fb.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Stefan Reinauer stefan.reinauer@coreboot.org
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Gerrit-Comment-Date: Thu, 15 Apr 2021 18:41:50 +0000
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