[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Set CNVi strap to disabled

[Sean Rhodes (Code Review)]

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87084?usp=email )

(

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: mb/starlabs/starbook/adl_n: Set CNVi strap to disabled
......................................................................

mb/starlabs/starbook/adl_n: Set CNVi strap to disabled

Set GPP_F2 to output high, to indicate that CNVi is disabled.

Change-Id: I82f3ce699d5e823e1ce942acb7a0ba1bd548d9a0
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87084
Tested-by: build bot (Jenkins) 
Reviewed-by: Matt DeVillier 
---
M src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Matt DeVillier: Looks good to me, approved

diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
index 9edd864..7d15cb9 100644
--- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
+++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
@@ -86,7 +86,7 @@
    PAD_CFG_GPO(GPP_C5, 0, RSMRST),					/* eSPI			[ Enabled  / Disabled ] */
    PAD_CFG_GPO(GPP_E6, 0, RSMRST),					/* JTAG ODT		[ Disabled / Enabled  ] */
    PAD_CFG_GPO(GPP_H1, 0, RSMRST),					/* BFX Strap 2 Bit 3	[ Disabled / Enabled  ] */
-	PAD_CFG_GPO(GPP_F2, 0, RSMRST),					/* M.2 CNVi		[ Enabled  / Disabled ] */
+	PAD_CFG_GPO(GPP_F2, 1, RSMRST),					/* M.2 CNVi		[ Enabled  / Disabled ] */
    PAD_CFG_GPO(GPP_E19, 0, RSMRST),				/* TBT LSX #0		[ 1.8V     / 3.3V     ] */
    PAD_CFG_GPO(GPP_E21, 0, RSMRST),				/* TBT LSX #1           [ 1.8V     / 3.3V     ] */
    PAD_CFG_GPO(GPP_D12, 0, RSMRST),				/* TBT LSX #3		[ 1.8V     / 3.3V     ] */