Change in coreboot[master]: soc/intel/{cnl,icl,jsl,tgl}/acpi: generate CPPC entries

[Michael Niewöhner (Code Review)]

Hello Elyes HAOUAS, build bot (Jenkins), Nico Huber, Paul Menzel, Subrata Banik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45536

to look at the new patch set (#6).

Change subject: soc/intel/{cnl,icl,jsl,tgl}/acpi: generate CPPC entries
......................................................................

soc/intel/{cnl,icl,jsl,tgl}/acpi: generate CPPC entries

Make use of the previously added common function for generating CPPC
entries, when Intel SpeedShift is enabled.

Change-Id: I40d47d18a35002bc9ec55473e94277d89fc5797e
Signed-off-by: Michael Niewöhner 
---
M src/soc/intel/cannonlake/acpi.c
M src/soc/intel/elkhartlake/acpi.c
M src/soc/intel/icelake/acpi.c
M src/soc/intel/jasperlake/acpi.c
M src/soc/intel/tigerlake/acpi.c
5 files changed, 20 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/45536/6