Michael Niewöhner uploaded patch set #6 to this change.

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soc/intel/{cnl,icl,jsl,tgl}/acpi: generate CPPC entries

Make use of the previously added common function for generating CPPC
entries, when Intel SpeedShift is enabled.

Change-Id: I40d47d18a35002bc9ec55473e94277d89fc5797e
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
---
M src/soc/intel/cannonlake/acpi.c
M src/soc/intel/elkhartlake/acpi.c
M src/soc/intel/icelake/acpi.c
M src/soc/intel/jasperlake/acpi.c
M src/soc/intel/tigerlake/acpi.c
5 files changed, 20 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/45536/6

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