Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50640 )
Change subject: soc/amd/common/block/data_fabric: add data_fabric_print_mmio_conf ......................................................................
soc/amd/common/block/data_fabric: add data_fabric_print_mmio_conf
Output on Picasso at the beginning of data_fabric_set_mmio_np:
=== Data Fabric MMIO configuration registers === Addresses are shifted to the right by 16 bits. idx control base limit 0 93 fc00 febf 1 93 1000000 ffffffff 2 93 d000 f7ff 3 90 0 0 4 93 fed0 fed0 5 90 0 0 6 90 0 0 7 90 0 0
Output on Picasso at the end of data_fabric_set_mmio_np:
=== Data Fabric MMIO configuration registers === Addresses are shifted to the right by 16 bits. idx control base limit 0 93 fc00 febf 1 93 1000000 ffffffff 2 93 d000 f7ff 3 1093 fed0 fedf 4 90 0 0 5 90 0 0 6 90 0 0 7 90 0 0
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I74617dfc6099489f3c81d0e385b502f1bbecea78 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50640 Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/common/block/data_fabric/data_fabric_helper.c M src/soc/amd/common/block/include/amdblocks/data_fabric.h M src/soc/amd/picasso/data_fabric.c 3 files changed, 21 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index d65bc8d..7bbdc7f 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -2,6 +2,7 @@
#include <amdblocks/data_fabric.h> #include <amdblocks/pci_devs.h> +#include <console/console.h> #include <device/pci_ops.h> #include <soc/data_fabric.h> #include <soc/pci_devs.h> @@ -42,6 +43,21 @@ pci_write_config32(SOC_DF_F4_DEV, DF_FICAD_LO, data); }
+void data_fabric_print_mmio_conf(void) +{ + printk(BIOS_SPEW, + "=== Data Fabric MMIO configuration registers ===\n" + "Addresses are shifted to the right by 16 bits.\n" + "idx control base limit\n"); + for (unsigned int i = 0; i < NUM_NB_MMIO_REGS; i++) { + printk(BIOS_SPEW, " %2u %8x %8x %8x\n", + i, + data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)), + data_fabric_broadcast_read32(0, NB_MMIO_BASE(i)), + data_fabric_broadcast_read32(0, NB_MMIO_LIMIT(i))); + } +} + void data_fabric_disable_mmio_reg(unsigned int reg) { data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h index 2c0396a..6df778d 100644 --- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h +++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h @@ -42,6 +42,7 @@ pci_write_config32(_SOC_DEV(DF_DEV, function), reg, data); }
+void data_fabric_print_mmio_conf(void); void data_fabric_disable_mmio_reg(unsigned int reg); int data_fabric_find_unused_mmio_reg(void);
diff --git a/src/soc/amd/picasso/data_fabric.c b/src/soc/amd/picasso/data_fabric.c index d07555a..982b7b2 100644 --- a/src/soc/amd/picasso/data_fabric.c +++ b/src/soc/amd/picasso/data_fabric.c @@ -39,6 +39,8 @@ const uint32_t np_bot = HPET_BASE_ADDRESS >> D18F0_MMIO_SHIFT; const uint32_t np_top = (LOCAL_APIC_ADDR - 1) >> D18F0_MMIO_SHIFT;
+ data_fabric_print_mmio_conf(); + for (i = 0; i < NUM_NB_MMIO_REGS; i++) { /* Adjust all registers that overlap */ ctrl = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)); @@ -92,6 +94,8 @@ data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), (IOMS0_FABRIC_ID << MMIO_DST_FABRIC_ID_SHIFT) | MMIO_NP | MMIO_WE | MMIO_RE); + + data_fabric_print_mmio_conf(); }
static const char *data_fabric_acpi_name(const struct device *dev)