Change in coreboot[master]: ec/pmh7: support 9bit address space

[Alexander Couzens (Code Review)]

Alexander Couzens has uploaded this change for review. ( https://review.coreboot.org/28196

Change subject: ec/pmh7: support 9bit address space
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ec/pmh7: support 9bit address space

The pmh7 has at least a 9bit address space. The h8s allows to access
the 9th address space by using io port 0x15ed as second address register.

The pmh7 is connected via SPI to the h8s. The h8s is acting as proxy to access
the address space.

Change-Id: I0d7ce00950862adf928a88d70afbc33df8b87d9a
---
M src/ec/lenovo/pmh7/pmh7.c
M src/ec/lenovo/pmh7/pmh7.h
2 files changed, 6 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/28196/1

diff --git a/src/ec/lenovo/pmh7/pmh7.c b/src/ec/lenovo/pmh7/pmh7.c
index b160fd0..765aa78 100644
--- a/src/ec/lenovo/pmh7/pmh7.c
+++ b/src/ec/lenovo/pmh7/pmh7.c
@@ -82,13 +82,15 @@

char pmh7_register_read(int reg)
 {
-	outb(reg, EC_LENOVO_PMH7_ADDR);
+	outb(reg & 0xff, EC_LENOVO_PMH7_ADDR_0);
+	outb((reg & 0xff00) >> 8, EC_LENOVO_PMH7_ADDR_1);
    return inb(EC_LENOVO_PMH7_DATA);
 }

void pmh7_register_write(int reg, int val)
 {
-	outb(reg, EC_LENOVO_PMH7_ADDR);
+	outb(reg & 0xff, EC_LENOVO_PMH7_ADDR_0);
+	outb((reg & 0xff00) >> 8, EC_LENOVO_PMH7_ADDR_1);
    outb(val, EC_LENOVO_PMH7_DATA);
 }

diff --git a/src/ec/lenovo/pmh7/pmh7.h b/src/ec/lenovo/pmh7/pmh7.h
index d486ceb..c5551a7 100644
--- a/src/ec/lenovo/pmh7/pmh7.h
+++ b/src/ec/lenovo/pmh7/pmh7.h
@@ -19,7 +19,8 @@
 #define EC_LENOVO_PMH7_INDEX 0x77

#define EC_LENOVO_PMH7_BASE 0x15e0
-#define EC_LENOVO_PMH7_ADDR (EC_LENOVO_PMH7_BASE + 0x0c)
+#define EC_LENOVO_PMH7_ADDR_0 (EC_LENOVO_PMH7_BASE + 0x0c)
+#define EC_LENOVO_PMH7_ADDR_1 (EC_LENOVO_PMH7_BASE + 0x0d)
 #define EC_LENOVO_PMH7_DATA (EC_LENOVO_PMH7_BASE + 0x0e)

#define EC_LENOVO_PMH7_REG_ID		0xc2