HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46236 )
Change subject: soc/intel/baytrail: Convert to ASL 2.0 syntax ......................................................................
soc/intel/baytrail: Convert to ASL 2.0 syntax
Change-Id: I0033698580439f90ac91570f1a4e73f9b235e53a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/intel/baytrail/acpi/dptf/charger.asl M src/soc/intel/baytrail/acpi/dptf/cpu.asl M src/soc/intel/baytrail/acpi/dptf/dptf.asl M src/soc/intel/baytrail/acpi/dptf/thermal.asl M src/soc/intel/baytrail/acpi/globalnvs.asl M src/soc/intel/baytrail/acpi/gpio.asl M src/soc/intel/baytrail/acpi/irqlinks.asl M src/soc/intel/baytrail/acpi/lpe.asl M src/soc/intel/baytrail/acpi/lpss.asl M src/soc/intel/baytrail/acpi/scc.asl M src/soc/intel/baytrail/acpi/southcluster.asl M src/soc/intel/baytrail/acpi/xhci.asl 12 files changed, 183 insertions(+), 184 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/46236/1
diff --git a/src/soc/intel/baytrail/acpi/dptf/charger.asl b/src/soc/intel/baytrail/acpi/dptf/charger.asl index b8c6d14..908d3a9 100644 --- a/src/soc/intel/baytrail/acpi/dptf/charger.asl +++ b/src/soc/intel/baytrail/acpi/dptf/charger.asl @@ -9,7 +9,7 @@
Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -26,11 +26,11 @@ Method (PPPC) { /* Convert size of PPSS table to index */ - Store (SizeOf (_SB.CHPS), Local0) - Decrement (Local0) + Local0 = SizeOf (_SB.CHPS) + Local0--
/* Check if charging is disabled (AC removed) */ - If (LEqual (\PWRS, Zero)) { + If (\PWRS == 0) { /* Return last power state */ Return (Local0) } Else { @@ -45,8 +45,7 @@ Method (SPPC, 1) { /* Retrieve Control (index 4) for specified PPSS level */ - Store (DeRefOf (Index (DeRefOf (Index - (_SB.CHPS, ToInteger (Arg0))), 4)), Local0) + Local0 = DeRefOf (DeRefOf (_SB.CHPS [ToInteger (Arg0)]) [4])
/* Pass Control value to EC to limit charging */ _SB.PCI0.LPCB.EC0.CHGS (Local0) diff --git a/src/soc/intel/baytrail/acpi/dptf/cpu.asl b/src/soc/intel/baytrail/acpi/dptf/cpu.asl index cd6a572..61eb452 100644 --- a/src/soc/intel/baytrail/acpi/dptf/cpu.asl +++ b/src/soc/intel/baytrail/acpi/dptf/cpu.asl @@ -13,7 +13,7 @@
Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -73,8 +73,8 @@ Method (_TDL) { If (CondRefOf (_SB.CP00._TSS)) { - Store (SizeOf (_SB.CP00._TSS ()), Local0) - Decrement (Local0) + Local0 = SizeOf (_SB.CP00._TSS ()) + Local0-- Return (Local0) } Else { Return (0) @@ -92,7 +92,7 @@
Method (SPPC, 1) { - Store (Arg0, \PPCM) + \PPCM = Arg0
/* Notify OS to re-read _PPC limit on each CPU */ \PPCN () @@ -116,8 +116,8 @@ If (CondRefOf (_SB.MPDL)) { Return (_SB.MPDL) } ElseIf (CondRefOf (_SB.CP00._PSS)) { - Store (SizeOf (_SB.CP00._PSS ()), Local0) - Decrement (Local0) + Local0 = SizeOf (_SB.CP00._PSS ()) + Local0-- Return (Local0) } Else { Return (0) diff --git a/src/soc/intel/baytrail/acpi/dptf/dptf.asl b/src/soc/intel/baytrail/acpi/dptf/dptf.asl index 66bfa45..3f49fe5 100644 --- a/src/soc/intel/baytrail/acpi/dptf/dptf.asl +++ b/src/soc/intel/baytrail/acpi/dptf/dptf.asl @@ -19,7 +19,7 @@
Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -36,7 +36,7 @@ Method (_OSC, 4, Serialized) { /* Check for Passive Policy UUID */ - If (LEqual (DeRefOf (Index (IDSP, 0)), Arg0)) { + If (DeRefOf (IDSP [0]) == Arg0) { /* Initialize Thermal Devices */ ^TINI ()
@@ -60,10 +60,10 @@ /* Convert from Degrees C to 1/10 Kelvin for ACPI */ Method (CTOK, 1) { /* 10th of Degrees C */ - Multiply (Arg0, 10, Local0) + Local0 = Arg0 * 10
/* Convert to Kelvin */ - Add (Local0, 2732, Local0) + Local0 += 2732
Return (Local0) } diff --git a/src/soc/intel/baytrail/acpi/dptf/thermal.asl b/src/soc/intel/baytrail/acpi/dptf/thermal.asl index 816c169..1f99301 100644 --- a/src/soc/intel/baytrail/acpi/dptf/thermal.asl +++ b/src/soc/intel/baytrail/acpi/dptf/thermal.asl @@ -6,20 +6,20 @@ #if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { - Store (ToInteger (Arg0), Local0) + Local0 = ToInteger (Arg0)
#ifdef DPTF_TSR0_SENSOR_ID - If (LEqual (Local0, DPTF_TSR0_SENSOR_ID)) { + If (Local0 == DPTF_TSR0_SENSOR_ID) { Notify (^TSR0, 0x90) } #endif #ifdef DPTF_TSR1_SENSOR_ID - If (LEqual (Local0, DPTF_TSR1_SENSOR_ID)) { + If (Local0 == DPTF_TSR1_SENSOR_ID) { Notify (^TSR1, 0x90) } #endif #ifdef DPTF_TSR2_SENSOR_ID - If (LEqual (Local0, DPTF_TSR2_SENSOR_ID)) { + If (Local0 == DPTF_TSR2_SENSOR_ID) { Notify (^TSR2, 0x90) } #endif @@ -52,7 +52,7 @@
Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -108,7 +108,7 @@
Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -164,7 +164,7 @@
Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl index c472d06..5fca68d 100644 --- a/src/soc/intel/baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/baytrail/acpi/globalnvs.asl @@ -65,27 +65,27 @@ /* Set flag to enable USB charging in S3 */ Method (S3UE) { - Store (One, \S3U0) - Store (One, \S3U1) + \S3U0 = 1 + \S3U1 = 1 }
/* Set flag to disable USB charging in S3 */ Method (S3UD) { - Store (Zero, \S3U0) - Store (Zero, \S3U1) + \S3U0 = 0 + \S3U1 = 0 }
/* Set flag to enable USB charging in S5 */ Method (S5UE) { - Store (One, \S5U0) - Store (One, \S5U1) + \S5U0 = 1 + \S5U1 = 1 }
/* Set flag to disable USB charging in S5 */ Method (S5UD) { - Store (Zero, \S5U0) - Store (Zero, \S5U1) + \S5U0 = 0 + \S5U1 = 0 } diff --git a/src/soc/intel/baytrail/acpi/gpio.asl b/src/soc/intel/baytrail/acpi/gpio.asl index 4e48cc6..e6dc536 100644 --- a/src/soc/intel/baytrail/acpi/gpio.asl +++ b/src/soc/intel/baytrail/acpi/gpio.asl @@ -22,7 +22,7 @@ Method (_CRS) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - Add (IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSCORE, RBAS) + RBAS = IO_BASE_ADDRESS + IO_BASE_OFFSET_GPSCORE Return (^RBUF) }
@@ -51,7 +51,7 @@ Method (_CRS) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - Add (IO_BASE_ADDRESS, IO_BASE_OFFSET_GPNCORE, RBAS) + RBAS = IO_BASE_ADDRESS + IO_BASE_OFFSET_GPNCORE Return (^RBUF) }
@@ -80,7 +80,7 @@ Method (_CRS) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - Add (IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSSUS, RBAS) + RBAS = IO_BASE_ADDRESS + IO_BASE_OFFSET_GPSSUS Return (^RBUF) }
diff --git a/src/soc/intel/baytrail/acpi/irqlinks.asl b/src/soc/intel/baytrail/acpi/irqlinks.asl index ef3bdd4..af89c33 100644 --- a/src/soc/intel/baytrail/acpi/irqlinks.asl +++ b/src/soc/intel/baytrail/acpi/irqlinks.asl @@ -8,7 +8,7 @@ /* Disable method */ Method (_DIS, 0, Serialized) { - Store (0x80, PRTA) + PRTA = 0x80 }
/* Possible Resource Settings for this Link */ @@ -28,10 +28,10 @@ CreateWordField(RTLA, 1, IRQ0)
/* Clear the WordField */ - Store (Zero, IRQ0) + IRQ0 = 0
/* Set the bit from PRTA */ - ShiftLeft(1, And(PRTA, 0x0f), IRQ0) + IRQ0 = 1 << (PRTA & 0x0f)
Return (RTLA) } @@ -44,14 +44,14 @@ /* Which bit is set? */ FindSetRightBit(IRQ0, Local0)
- Decrement(Local0) - Store(Local0, PRTA) + Local0-- + PRTA = Local0 }
/* Status */ Method (_STA, 0, Serialized) { - If(And(PRTA, 0x80)) { + If (PRTA & 0x80) { Return (0x9) } Else { Return (0xb) @@ -67,7 +67,7 @@ /* Disable method */ Method (_DIS, 0, Serialized) { - Store (0x80, PRTB) + PRTB = 0x80 }
/* Possible Resource Settings for this Link */ @@ -87,10 +87,10 @@ CreateWordField(RTLB, 1, IRQ0)
/* Clear the WordField */ - Store (Zero, IRQ0) + IRQ0 = 0
/* Set the bit from PRTB */ - ShiftLeft(1, And(PRTB, 0x0f), IRQ0) + IRQ0 = 1 << (PRTB & 0x0f)
Return (RTLB) } @@ -103,14 +103,14 @@ /* Which bit is set? */ FindSetRightBit(IRQ0, Local0)
- Decrement(Local0) - Store(Local0, PRTB) + Local0-- + PRTB = Local0 }
/* Status */ Method (_STA, 0, Serialized) { - If(And(PRTB, 0x80)) { + If (PRTB & 0x80) { Return (0x9) } Else { Return (0xb) @@ -126,7 +126,7 @@ /* Disable method */ Method (_DIS, 0, Serialized) { - Store (0x80, PRTC) + PRTC = 0x80 }
/* Possible Resource Settings for this Link */ @@ -146,10 +146,10 @@ CreateWordField(RTLC, 1, IRQ0)
/* Clear the WordField */ - Store (Zero, IRQ0) + IRQ0 = 0
/* Set the bit from PRTC */ - ShiftLeft(1, And(PRTC, 0x0f), IRQ0) + IRQ0 = 1 << (PRTC & 0x0f)
Return (RTLC) } @@ -162,14 +162,14 @@ /* Which bit is set? */ FindSetRightBit(IRQ0, Local0)
- Decrement(Local0) - Store(Local0, PRTC) + Local0-- + PRTC = Local0 }
/* Status */ Method (_STA, 0, Serialized) { - If(And(PRTC, 0x80)) { + If (PRTC & 0x80) { Return (0x9) } Else { Return (0xb) @@ -185,7 +185,7 @@ /* Disable method */ Method (_DIS, 0, Serialized) { - Store (0x80, PRTD) + PRTD = 0x80 }
/* Possible Resource Settings for this Link */ @@ -205,10 +205,10 @@ CreateWordField(RTLD, 1, IRQ0)
/* Clear the WordField */ - Store (Zero, IRQ0) + IRQ0 = 0
/* Set the bit from PRTD */ - ShiftLeft(1, And(PRTD, 0x0f), IRQ0) + IRQ0 = 1 << (PRTD & 0x0f)
Return (RTLD) } @@ -221,14 +221,14 @@ /* Which bit is set? */ FindSetRightBit(IRQ0, Local0)
- Decrement(Local0) - Store(Local0, PRTD) + Local0-- + PRTD = Local0 }
/* Status */ Method (_STA, 0, Serialized) { - If(And(PRTD, 0x80)) { + If (PRTD & 0x80) { Return (0x9) } Else { Return (0xb) @@ -244,7 +244,7 @@ /* Disable method */ Method (_DIS, 0, Serialized) { - Store (0x80, PRTE) + PRTE = 0x80 }
/* Possible Resource Settings for this Link */ @@ -264,10 +264,10 @@ CreateWordField(RTLE, 1, IRQ0)
/* Clear the WordField */ - Store (Zero, IRQ0) + IRQ0 = 0
/* Set the bit from PRTE */ - ShiftLeft(1, And(PRTE, 0x0f), IRQ0) + IRQ0 = 1 << (PRTE & 0x0f)
Return (RTLE) } @@ -280,14 +280,14 @@ /* Which bit is set? */ FindSetRightBit(IRQ0, Local0)
- Decrement(Local0) - Store(Local0, PRTE) + Local0-- + PRTE = Local0 }
/* Status */ Method (_STA, 0, Serialized) { - If(And(PRTE, 0x80)) { + If (PRTE & 0x80) { Return (0x9) } Else { Return (0xb) @@ -303,7 +303,7 @@ /* Disable method */ Method (_DIS, 0, Serialized) { - Store (0x80, PRTF) + PRTF = 0x80 }
/* Possible Resource Settings for this Link */ @@ -323,10 +323,10 @@ CreateWordField(RTLF, 1, IRQ0)
/* Clear the WordField */ - Store (Zero, IRQ0) + IRQ0 = 0
/* Set the bit from PRTF */ - ShiftLeft(1, And(PRTF, 0x0f), IRQ0) + IRQ0 = 1 << (PRTF & 0x0f)
Return (RTLF) } @@ -339,14 +339,14 @@ /* Which bit is set? */ FindSetRightBit(IRQ0, Local0)
- Decrement(Local0) - Store(Local0, PRTF) + Local0-- + PRTF = Local0 }
/* Status */ Method (_STA, 0, Serialized) { - If(And(PRTF, 0x80)) { + If (PRTF & 0x80) { Return (0x9) } Else { Return (0xb) @@ -362,7 +362,7 @@ /* Disable method */ Method (_DIS, 0, Serialized) { - Store (0x80, PRTG) + PRTG = 0x80 }
/* Possible Resource Settings for this Link */ @@ -382,10 +382,10 @@ CreateWordField(RTLG, 1, IRQ0)
/* Clear the WordField */ - Store (Zero, IRQ0) + IRQ0 = 0
/* Set the bit from PRTG */ - ShiftLeft(1, And(PRTG, 0x0f), IRQ0) + IRQ0 = 1 << (PRTG & 0x0f)
Return (RTLG) } @@ -398,14 +398,14 @@ /* Which bit is set? */ FindSetRightBit(IRQ0, Local0)
- Decrement(Local0) - Store(Local0, PRTG) + Local0-- + PRTG = Local0 }
/* Status */ Method (_STA, 0, Serialized) { - If(And(PRTG, 0x80)) { + If (PRTG & 0x80) { Return (0x9) } Else { Return (0xb) @@ -421,7 +421,7 @@ /* Disable method */ Method (_DIS, 0, Serialized) { - Store (0x80, PRTH) + PRTH = 0x80 }
/* Possible Resource Settings for this Link */ @@ -441,10 +441,10 @@ CreateWordField(RTLH, 1, IRQ0)
/* Clear the WordField */ - Store (Zero, IRQ0) + IRQ0 = 0
/* Set the bit from PRTH */ - ShiftLeft(1, And(PRTH, 0x0f), IRQ0) + IRQ0 = 1 << (PRTH & 0x0f)
Return (RTLH) } @@ -457,14 +457,14 @@ /* Which bit is set? */ FindSetRightBit(IRQ0, Local0)
- Decrement(Local0) - Store(Local0, PRTH) + Local0-- + PRTH = Local0 }
/* Status */ Method (_STA, 0, Serialized) { - If(And(PRTH, 0x80)) { + If (PRTH & 0x80) { Return (0x9) } Else { Return (0xb) diff --git a/src/soc/intel/baytrail/acpi/lpe.asl b/src/soc/intel/baytrail/acpi/lpe.asl index a0a08b8..0e52cc8 100644 --- a/src/soc/intel/baytrail/acpi/lpe.asl +++ b/src/soc/intel/baytrail/acpi/lpe.asl @@ -43,15 +43,15 @@ { /* Update BAR0 from NVS */ CreateDwordField (^RBUF, ^BAR0._BAS, BAS0) - Store (\LPB0, BAS0) + BAS0 = \LPB0
/* Update BAR1 from NVS */ CreateDwordField (^RBUF, ^BAR1._BAS, BAS1) - Store (\LPB1, BAS1) + BAS1 = \LPB1
/* Update LPE FW from NVS */ CreateDwordField (^RBUF, ^BAR2._BAS, BAS2) - Store (\LPFW, BAS2) + BAS2 = \LPFW
/* Append any Mainboard defined GPIOs */ If (CondRefOf (^GBUF)) { @@ -64,7 +64,7 @@
Method (_STA) { - If (LEqual (\LPEN, 1)) { + If (\LPEN == 1) { Return (0xF) } Else { Return (0x0) @@ -87,14 +87,14 @@
Method (_OFF) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_ON) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } } } diff --git a/src/soc/intel/baytrail/acpi/lpss.asl b/src/soc/intel/baytrail/acpi/lpss.asl index 6ba615d..94f16ea 100644 --- a/src/soc/intel/baytrail/acpi/lpss.asl +++ b/src/soc/intel/baytrail/acpi/lpss.asl @@ -18,13 +18,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S0B0, RBAS) + RBAS = \S0B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S0EN, 1)) { + If (\S0EN == 1) { Return (0xF) } Else { Return (0x0) @@ -50,13 +50,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S8B0, RBAS) + RBAS = \S8B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S8EN, 1)) { + If (\S8EN == 1) { Return (0xF) } Else { Return (0x0) @@ -90,13 +90,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S1B0, RBAS) + RBAS = \S1B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S1EN, 1)) { + If (\S1EN == 1) { Return (0xF) } Else { Return (0x0) @@ -112,14 +112,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -149,13 +149,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S2B0, RBAS) + RBAS = \S2B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S2EN, 1)) { + If (\S2EN == 1) { Return (0xF) } Else { Return (0x0) @@ -171,14 +171,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -208,13 +208,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S3B0, RBAS) + RBAS = \S3B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S3EN, 1)) { + If (\S3EN == 1) { Return (0xF) } Else { Return (0x0) @@ -230,14 +230,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -267,13 +267,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S4B0, RBAS) + RBAS = \S4B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S4EN, 1)) { + If (\S4EN == 1) { Return (0xF) } Else { Return (0x0) @@ -289,14 +289,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -326,13 +326,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S5B0, RBAS) + RBAS = \S5B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S5EN, 1)) { + If (\S5EN == 1) { Return (0xF) } Else { Return (0x0) @@ -348,14 +348,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -385,13 +385,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S6B0, RBAS) + RBAS = \S6B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S6EN, 1)) { + If (\S6EN == 1) { Return (0xF) } Else { Return (0x0) @@ -407,14 +407,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -444,13 +444,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S7B0, RBAS) + RBAS = \S7B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S7EN, 1)) { + If (\S7EN == 1) { Return (0xF) } Else { Return (0x0) @@ -466,14 +466,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -497,13 +497,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\S9B0, RBAS) + RBAS = \S9B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\S9EN, 1)) { + If (\S9EN == 1) { Return (0xF) } Else { Return (0x0) @@ -519,14 +519,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -544,13 +544,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\SAB0, RBAS) + RBAS = \SAB0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\SAEN, 1)) { + If (\SAEN == 1) { Return (0xF) } Else { Return (0x0) @@ -572,13 +572,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\SBB0, RBAS) + RBAS = \SBB0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\SBEN, 1)) { + If (\SBEN == 1) { Return (0xF) } Else { Return (0x0) @@ -606,13 +606,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\SCB0, RBAS) + RBAS = \SCB0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\SCEN, 1)) { + If (\SCEN == 1) { Return (0xF) } Else { Return (0x0) @@ -628,14 +628,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -659,13 +659,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\SDB0, RBAS) + RBAS = \SDB0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\SDEN, 1)) { + If (\SDEN == 1) { Return (0xF) } Else { Return (0x0) @@ -681,13 +681,13 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } } diff --git a/src/soc/intel/baytrail/acpi/scc.asl b/src/soc/intel/baytrail/acpi/scc.asl index cf0debd..7f58687 100644 --- a/src/soc/intel/baytrail/acpi/scc.asl +++ b/src/soc/intel/baytrail/acpi/scc.asl @@ -19,13 +19,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\C0B0, RBAS) + RBAS = \C0B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\C0EN, 1)) { + If (\C0EN == 1) { Return (0xF) } Else { Return (0x0) @@ -41,14 +41,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 }
Device (EM45) @@ -82,13 +82,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\C1B0, RBAS) + RBAS = \C1B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\C1EN, 1)) { + If (\C1EN == 1) { Return (0xF) } Else { Return (0x0) @@ -104,14 +104,14 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } }
@@ -134,13 +134,13 @@ Method (_CRS) { CreateDwordField (^RBUF, ^BAR0._BAS, RBAS) - Store (\C2B0, RBAS) + RBAS = \C2B0 Return (^RBUF) }
Method (_STA) { - If (LEqual (\C2EN, 1)) { + If (\C2EN == 1) { Return (0xF) } Else { Return (0x0) @@ -156,13 +156,13 @@
Method (_PS3) { - Or (PSAT, 0x00000003, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT |= 0x00000003 + PSAT |= 0x00000000 }
Method (_PS0) { - And (PSAT, 0xfffffffc, PSAT) - Or (PSAT, 0x00000000, PSAT) + PSAT &= 0xfffffffc + PSAT |= 0x00000000 } } diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl index e3997d7..fb4a79c 100644 --- a/src/soc/intel/baytrail/acpi/southcluster.asl +++ b/src/soc/intel/baytrail/acpi/southcluster.asl @@ -158,9 +158,9 @@ CreateDwordField(MCRS, ^PMEM._LEN, PLEN)
/* TOLM is BMBOUND accessible from IOSF so is saved in NVS */ - Store (\TOLM, PMIN) - Store (Subtract(CONFIG_MMCONF_BASE_ADDRESS, 1), PMAX) - Add (Subtract (PMAX, PMIN), 1, PLEN) + PMIN = \TOLM + PMAX = CONFIG_MMCONF_BASE_ADDRESS - 1 + PLEN = PMAX - PMIN + 1
Return (MCRS) } @@ -192,7 +192,7 @@ Method (_OSC, 4) { /* Check for proper GUID */ - If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) + If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { /* Let OS control everything */ Return (Arg3) @@ -201,7 +201,7 @@ { /* Unrecognized UUID */ CreateDWordField (Arg3, 0, CDW1) - Or (CDW1, 4, CDW1) + CDW1 |= 4 Return (Arg3) } } @@ -222,7 +222,7 @@ Method (_CRS) { CreateDwordField (^RBUF, ^RBAR._BAS, RBAS) - Store (Add (MCFG_BASE_ADDRESS, 0xD0), RBAS) + RBAS = MCFG_BASE_ADDRESS + 0xD0 Return (^RBUF) } } diff --git a/src/soc/intel/baytrail/acpi/xhci.asl b/src/soc/intel/baytrail/acpi/xhci.asl index bfed3c6..d3706a4 100644 --- a/src/soc/intel/baytrail/acpi/xhci.asl +++ b/src/soc/intel/baytrail/acpi/xhci.asl @@ -18,11 +18,11 @@
// REV: Revision 0x02 for ACPI 5.0 CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) - Store (0x02, REV) + REV = 0x02
// VISI: Port visibility to user per port CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) - Store (Arg0, VISI) + VISI = Arg0 Return (PCKG) }
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46236
to look at the new patch set (#3).
Change subject: soc/intel/baytrail: Convert to ASL 2.0 syntax ......................................................................
soc/intel/baytrail: Convert to ASL 2.0 syntax
Change-Id: I0033698580439f90ac91570f1a4e73f9b235e53a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/intel/baytrail/acpi/dptf/charger.asl M src/soc/intel/baytrail/acpi/dptf/cpu.asl M src/soc/intel/baytrail/acpi/dptf/dptf.asl M src/soc/intel/baytrail/acpi/dptf/thermal.asl M src/soc/intel/baytrail/acpi/globalnvs.asl M src/soc/intel/baytrail/acpi/gpio.asl M src/soc/intel/baytrail/acpi/irqlinks.asl M src/soc/intel/baytrail/acpi/lpe.asl M src/soc/intel/baytrail/acpi/lpss.asl M src/soc/intel/baytrail/acpi/scc.asl M src/soc/intel/baytrail/acpi/southcluster.asl M src/soc/intel/baytrail/acpi/xhci.asl 12 files changed, 183 insertions(+), 184 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/46236/3
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/46236 )
Change subject: soc/intel/baytrail: Convert to ASL 2.0 syntax ......................................................................
Abandoned
Merge Conflict
-
HAOUAS Elyes (Code Review)