Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/29188
Change subject: soc/intel/common/block/gpio: Allow GPI to be dual-routed ......................................................................
soc/intel/common/block/gpio: Allow GPI to be dual-routed
This change adds new macros to GPIO common library helpers to allow a GPI pad to be dual routed using PAD_CFG_GPI_DUAL_ROUTE. It also adds a helper macro to configure a pad for IRQ and wake.
BUG=b:117553222
Change-Id: Iaa623d2d78a50f1504e3abe9a47a5a663693aead Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/29188/1
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index 855659a..9495bb7 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -130,6 +130,12 @@ PAD_CFG0_TRIG_##trig | \ PAD_CFG0_RX_POL_##inv)
+#define PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv) \ + (PAD_CFG0_ROUTE_##route1 | \ + PAD_CFG0_ROUTE_##route2 | \ + PAD_CFG0_TRIG_##trig | \ + PAD_CFG0_RX_POL_##inv) + #define _PAD_CFG_STRUCT(__pad, __config0, __config1) \ { \ .pad = __pad, \ @@ -334,4 +340,13 @@ PAD_IRQ_CFG(NMI, trig, inv), PAD_PULL(pull) | \ PAD_IOSSTATE(TxLASTRxE))
+#define PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2) \ + _PAD_CFG_STRUCT(pad, \ + PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \ + PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv), \ + PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE)) + +#define PAD_CFG_GPI_IRQ_WAKE(pad, pull, rst, trig, inv) \ + PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, IOAPIC, SCI) + #endif /* _SOC_BLOCK_GPIO_DEFS_H_ */
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Furquan Shaikh (Code Review)