Change in coreboot[master]: sb/intel/i82371eb: Claim less I/O ports in ACPI

List overview All Threads
Download

newer

older

Change in coreboot[master]:...

Keith Hui (Code Review)

6 May 2020 6 May '20

4:18 p.m.

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Claim less I/O ports in ACPI ......................................................................

sb/intel/i82371eb: Claim less I/O ports in ACPI

To avoid resource conflicts, this change leaves unclaimed: - PM and SMBus ports (claimed by MBRS device written in SSDT) - Ports 0x2e-0x2f (After reviewing Asus P3B-F OEM firmware)

Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/acpi/i82371eb.asl 1 file changed, 4 insertions(+), 14 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41093/1

diff --git a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl index 8b60edb..45e7a5e 100644 --- a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl +++ b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl @@ -31,15 +31,13 @@ { Name (BUF1, ResourceTemplate () { - /* PM register ports */ - IO (Decode16, 0x0000, 0x0000, 0x01, 0x40, _Y06) - /* SMBus register ports */ - IO (Decode16, 0x0000, 0x0000, 0x01, 0x10, _Y07) /* PIIX4E ports */ /* Aliased DMA ports */ IO (Decode16, 0x0010, 0x0010, 0x01, 0x10, ) /* Aliased PIC ports */ - IO (Decode16, 0x0022, 0x0022, 0x01, 0x1E, ) + /* Do not claim 0x2e-0x2f, per P3B-F vendor DSDT */ + IO (Decode16, 0x0022, 0x0022, 0x01, 0x0C, ) + IO (Decode16, 0x0030, 0x0030, 0x01, 0x10, ) /* Aliased timer ports */ IO (Decode16, 0x0050, 0x0050, 0x01, 0x04, ) IO (Decode16, 0x0062, 0x0062, 0x01, 0x02, ) @@ -49,18 +47,10 @@ IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E, ) IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10, ) IO (Decode16, 0x0294, 0x0294, 0x01, 0x04, ) + /* W83977TF/EF Super I/O config ports */ IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x02, ) IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02, ) }) - CreateWordField (BUF1, _Y06._MIN, PMLO) - CreateWordField (BUF1, _Y06._MAX, PMRL) - CreateWordField (BUF1, _Y07._MIN, SBLO) - CreateWordField (BUF1, _Y07._MAX, SBRL) - - And (_SB.PCI0.PX43.PM00, 0xFFFE, PMLO) - And (_SB.PCI0.PX43.SB00, 0xFFFE, SBLO) - Store (PMLO, PMRL) - Store (SBLO, SBRL) Return (BUF1) } }

Attachments:

attachment.htm (text/html — 4.8 KB)

Show replies by date

HAOUAS Elyes (Code Review)

6 May 6 May

4:25 p.m.

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Claim less I/O ports in ACPI ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41093/1/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/acpi/i82371eb.asl:

https://review.coreboot.org/c/coreboot/+/41093/1/src/southbridge/intel/i8237... PS1, Line 50: W83977TF/EF Super I/O config ports * i82371eb has a W83977TF/EF Super I/O ?

Keith Hui (Code Review)

4:57 p.m.

Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Claim less I/O ports in ACPI ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41093/1/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/acpi/i82371eb.asl:

https://review.coreboot.org/c/coreboot/+/41093/1/src/southbridge/intel/i8237... PS1, Line 50: W83977TF/EF Super I/O config ports *

...

i82371eb has a W83977TF/EF Super I/O ?

It's a separate chip, but even the OEM firmware left i82371eb to claim those two ports. These two are for configuring it; ports for its logical devices are declared under superio/ as usual.

Since this patch is to claim less ports, split these ports off?

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: HAOUAS Elyes ehaouas@noos.fr Gerrit-Comment-Date: Wed, 06 May 2020 16:57:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: HAOUAS Elyes ehaouas@noos.fr Gerrit-MessageType: comment

HAOUAS Elyes (Code Review)

6:57 p.m.

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Claim less I/O ports in ACPI ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41093/1/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/acpi/i82371eb.asl:

https://review.coreboot.org/c/coreboot/+/41093/1/src/southbridge/intel/i8237... PS1, Line 50: W83977TF/EF Super I/O config ports *

...

It's a separate chip, but even the OEM firmware left i82371eb to claim those two ports. […]

no, what I mean is you probably have to remove "W83977TF/EF" and keep "Super io" if you want.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: HAOUAS Elyes ehaouas@noos.fr Gerrit-Comment-Date: Wed, 06 May 2020 18:57:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Keith Hui buurin@gmail.com Comment-In-Reply-To: HAOUAS Elyes ehaouas@noos.fr Gerrit-MessageType: comment

Keith Hui (Code Review)

16 May 16 May

3:04 a.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41093

to look at the new patch set (#2).

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

And since these two port ranges are not expected to change at runtime, use a #defined fixed value instead of reading from southbridge.

Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/acpi/i82371eb.asl 1 file changed, 18 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41093/2

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: HAOUAS Elyes ehaouas@noos.fr Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Keith Hui (Code Review)

8:21 p.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41093

to look at the new patch set (#3).

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

And since these two port ranges are not expected to change at runtime, use a #defined fixed value instead of reading from southbridge.

Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/acpi/i82371eb.asl 1 file changed, 9 insertions(+), 21 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41093/3

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: HAOUAS Elyes ehaouas@noos.fr Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Angel Pons (Code Review)

17 May 17 May

2:25 p.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

Patch Set 3: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: HAOUAS Elyes ehaouas@noos.fr Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Sun, 17 May 2020 14:25:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Keith Hui (Code Review)

26 Dec 26 Dec

8:42 p.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41093

to look at the new patch set (#8).

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

And since these two port ranges are not expected to change at runtime, use a #defined fixed value instead of reading from southbridge.

Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/acpi/i82371eb.asl 1 file changed, 0 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41093/8

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 8 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Keith Hui (Code Review)

27 Dec 27 Dec

3:01 a.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41093

to look at the new patch set (#9).

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

And since these two port ranges are not expected to change at runtime, use a #defined fixed value instead of reading from southbridge.

Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/acpi/i82371eb.asl 1 file changed, 0 insertions(+), 24 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41093/9

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 9 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Angel Pons (Code Review)

21 Mar 21 Mar

9:10 a.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Attention is currently required from: Keith Hui. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

Patch Set 10:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/41093/comment/bc703dcf_1e822e44 PS10, Line 7: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device Am I missing something? I only see removals in this change. Maybe the commit message needs an update?

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 10 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Keith Hui buurin@gmail.com Gerrit-Comment-Date: Sun, 21 Mar 2021 09:10:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Keith Hui (Code Review)

10:59 a.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Attention is currently required from: Angel Pons. Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

Patch Set 10:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/41093/comment/e9347ba3_dda7c14f PS10, Line 7: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

...

Am I missing something? I only see removals in this change. […]

Could be a miss from trying to rebase this patch. I will look at it tonight.

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 10 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Angel Pons th3fanbus@gmail.com Gerrit-Comment-Date: Sun, 21 Mar 2021 10:59:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Keith Hui (Code Review)

28 Mar 28 Mar

9:11 p.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Attention is currently required from: Angel Pons. Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

Patch Set 10:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/41093/comment/f55ded8a_432ac114 PS10, Line 7: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

...

Could be a miss from trying to rebase this patch. I will look at it tonight.

I took another look at what I did. It looks the additions meant for here, went in with CB:41050 (that was committed earlier) instead. I must have botched my rebase. This patch would also have to go in to finish off both patches. Sorry for the trouble. How should this commit message be updated, if at all?

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 10 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Angel Pons th3fanbus@gmail.com Gerrit-Comment-Date: Sun, 28 Mar 2021 21:11:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Comment-In-Reply-To: Keith Hui buurin@gmail.com Gerrit-MessageType: comment

Angel Pons (Code Review)

9:36 p.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

Attention is currently required from: Keith Hui. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device ......................................................................

Patch Set 10: Code-Review+1

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/41093/comment/6ef10306_7708b07b PS10, Line 7: sb/intel/i82371eb: Hang PM/SMBus I/O ports off its own device

...

I took another look at what I did. […]

something like "Remove redundant port declarations in ACPI" for the commit summary, and adapt the commit message accordingly (e.g. explain that commit 023fdaffd14f7d3d70a81041bf76095fb50869f8 added the port declarations to the PX43 device).

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 10 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Keith Hui buurin@gmail.com Gerrit-Comment-Date: Sun, 28 Mar 2021 21:36:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Comment-In-Reply-To: Keith Hui buurin@gmail.com Gerrit-MessageType: comment

Keith Hui (Code Review)

29 Mar 29 Mar

2:50 a.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Attention is currently required from: Keith Hui. Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41093

to look at the new patch set (#11).

Change subject: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime ......................................................................

sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Commit 023fdaf moved the southbridge ACPI stuff to its own file. It also (prematurely) listed PM and SMBus I/O port ranges as a #defined fixed value.

Since these two ranges are not expected to change at runtime anyway, we can simply drop the ASL code doing the read.

Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/acpi/i82371eb.asl 1 file changed, 0 insertions(+), 24 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41093/11

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 11 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Keith Hui buurin@gmail.com Gerrit-MessageType: newpatchset

Angel Pons (Code Review)

8:52 a.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Attention is currently required from: Keith Hui. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime ......................................................................

Patch Set 11: Code-Review+1

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/41093/comment/74ad4b7d_daaeee0f PS11, Line 9: Commit 023fdaf moved the southbridge ACPI stuff to its own file. It also I'd also include the commit summary in case the short hash collides in the future:

Commit 023fdaffd1 (mb/asus/p2b: Refactor southbridge ACPI stuff)

https://review.coreboot.org/c/coreboot/+/41093/comment/0268f0a5_e279b833 PS11, Line 10: value. nit: wrap commit message lines at 72 chars (this word doesn't fit on this line)

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 11 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Keith Hui buurin@gmail.com Gerrit-Comment-Date: Mon, 29 Mar 2021 08:52:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Keith Hui (Code Review)

4:24 p.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Attention is currently required from: Keith Hui. Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41093

to look at the new patch set (#12).

Change subject: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime ......................................................................

sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Commit 023fdaffd1 (mb/asus/p2b: Refactor southbridge ACPI stuff) moved the southbridge ACPI stuff to its own file. It also (prematurely) listed PM and SMBus I/O port ranges as a #defined fixed value.

Since these two ranges are not expected to change at runtime anyway, we can simply drop the ASL code doing the read.

Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/acpi/i82371eb.asl 1 file changed, 0 insertions(+), 24 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41093/12

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 12 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Keith Hui buurin@gmail.com Gerrit-MessageType: newpatchset

Keith Hui (Code Review)

4:25 p.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Attention is currently required from: Angel Pons. Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime ......................................................................

Patch Set 12:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/41093/comment/c0bf7cbf_1b51a0ff PS11, Line 9: Commit 023fdaf moved the southbridge ACPI stuff to its own file. It also

...

I'd also include the commit summary in case the short hash collides in the future: […]

Done

https://review.coreboot.org/c/coreboot/+/41093/comment/bac75850_c76800b8 PS11, Line 10: value.

...

nit: wrap commit message lines at 72 chars (this word doesn't fit on this line)

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 12 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Angel Pons th3fanbus@gmail.com Gerrit-Comment-Date: Mon, 29 Mar 2021 16:25:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Angel Pons (Code Review)

4:39 p.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Attention is currently required from: Keith Hui. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime ......................................................................

Patch Set 12: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 12 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Attention: Keith Hui buurin@gmail.com Gerrit-Comment-Date: Mon, 29 Mar 2021 16:39:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Patrick Georgi (Code Review)

6 Apr 6 Apr

7:10 a.m.

New subject: Change in coreboot[master]: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41093 )

Change subject: sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime ......................................................................

sb/intel/i82371eb: Do not read PM/SMBus I/O ports at runtime

Commit 023fdaffd1 (mb/asus/p2b: Refactor southbridge ACPI stuff) moved the southbridge ACPI stuff to its own file. It also (prematurely) listed PM and SMBus I/O port ranges as a #defined fixed value.

Since these two ranges are not expected to change at runtime anyway, we can simply drop the ASL code doing the read.

Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Signed-off-by: Keith Hui buurin@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41093 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/southbridge/intel/i82371eb/acpi/i82371eb.asl 1 file changed, 0 insertions(+), 24 deletions(-)

Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved

diff --git a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl index 17fd61d..e3e67ea 100644 --- a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl +++ b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl @@ -30,10 +30,6 @@ { Name (BUF1, ResourceTemplate () { - /* PM register ports */ - IO (Decode16, 0x0000, 0x0000, 0x01, 0x40, _Y06) - /* SMBus register ports */ - IO (Decode16, 0x0000, 0x0000, 0x01, 0x10, _Y07) /* PIIX4E ports */ /* Aliased DMA ports */ IO (Decode16, 0x0010, 0x0010, 0x01, 0x10, ) @@ -51,14 +47,6 @@ IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x02, ) IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02, ) }) - CreateWordField (BUF1, _Y06._MIN, PMLO) - CreateWordField (BUF1, _Y06._MAX, PMRL) - CreateWordField (BUF1, _Y07._MIN, SBLO) - CreateWordField (BUF1, _Y07._MAX, SBRL) - And (_SB.PCI0.PX43.PM00, 0xFFFE, PMLO) - And (_SB.PCI0.PX43.SB00, 0xFFFE, SBLO) - Store (PMLO, PMRL) - Store (SBLO, SBRL) Return (BUF1) } } @@ -145,16 +133,4 @@ }) Return (BUF1) } - - OperationRegion (IPMU, PCI_Config, PMBA, 0x02) - Field (IPMU, ByteAcc, NoLock, Preserve) - { - PM00, 16 - } - - OperationRegion (ISMB, PCI_Config, SMBBA, 0x02) - Field (ISMB, ByteAcc, NoLock, Preserve) - { - SB00, 16 - } }

-- To view, visit https://review.coreboot.org/c/coreboot/+/41093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5adb37d047621d7c8faf81607ceea4cbcac3d34 Gerrit-Change-Number: 41093 Gerrit-PatchSet: 13 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: merged

1333

days inactive

1668

days old

coreboot-gerrit@coreboot.org

18 comments

4 participants

tags (0)

participants (4)

Angel Pons (Code Review)
HAOUAS Elyes (Code Review)
Keith Hui (Code Review)
Patrick Georgi (Code Review)