Change in coreboot[master]: mb/google/atlas: Add DISPLAY_DCR_EN GPIO pin

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/28070 )

Change subject: mb/google/atlas: Add DISPLAY_DCR_EN GPIO pin
......................................................................

mb/google/atlas: Add DISPLAY_DCR_EN GPIO pin

This defines new GPIO pin for controlling the display panel CABC
function.  The default value is high (enabled).

BUG=b:112154569

Change-Id: I29083ab18e37f929a55b450b143463c67fe0abea
Signed-off-by: Caveh Jalali 
Reviewed-on: https://review.coreboot.org/28070
Reviewed-by: Furquan Shaikh 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/poppy/variants/atlas/gpio.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  caveh jalali: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/poppy/variants/atlas/gpio.c b/src/mainboard/google/poppy/variants/atlas/gpio.c
index 51dbf69..c0ef9ef 100644
--- a/src/mainboard/google/poppy/variants/atlas/gpio.c
+++ b/src/mainboard/google/poppy/variants/atlas/gpio.c
@@ -215,8 +215,8 @@
    PAD_CFG_NC(GPP_E4),
    /* E5  : SATA_DEVSLP1 ==> NC */
    PAD_CFG_NC(GPP_E5),
-	/* E6  : SATA_DEVSLP2 ==> NC */
-	PAD_CFG_NC(GPP_E6),
+	/* E6  : SATA_DEVSLP2 ==> DISPLAY_DCR_EN */
+	PAD_CFG_GPO(GPP_E6, 1, DEEP),
    /* E7  : CPU_GP1 ==> TOUCHSCREEN_INT_L */
    PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST),
    /* E8  : SATALED# ==> NC */