[M] Change in coreboot[main]: soc/amd/phoenix/pci_irq_routing.c: Populate PCI IRQ routing table

[Nick Kochlowski (Code Review)]

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Marshall Dawson, Matt DeVillier, Nick Kochlowski.

Hello Felix Held, Fred Reitberger, Jason Glenesk, Marshall Dawson, Matt DeVillier, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85195?usp=email

to look at the new patch set (#8).

Change subject: soc/amd/phoenix/pci_irq_routing.c: Populate PCI IRQ routing table
......................................................................

soc/amd/phoenix/pci_irq_routing.c: Populate PCI IRQ routing table

Populate the PCI bridge IRQ routing table for Phoenix from the SMN
registers to replace the stub implementation. The base addresses are
copied from Genoa OpenSIL headers, which also correspond to Phoenix.

TEST=Successful build and boot. There are no longer warnings about not being able to write PCI IRQ assignments.

Before applying patch:

[NOTE ] get_pci_routing_table stub: returning empty IRQ routing table
[WARN ] Can't write PCI IRQ assignments because 'mainboard_pirq_data'
structure does not exist

After applying patch:

[DEBUG] 01.1: group: 0, swizzle: 0, irq: 0
[DEBUG] 01.2: group: 1, swizzle: 0, irq: 0
[DEBUG] 01.4: group: 0, swizzle: 2, irq: 2
[DEBUG] 01.5: group: 3, swizzle: 0, irq: 0
[DEBUG] 01.6: group: 4, swizzle: 0, irq: 0
[DEBUG] 02.5: group: 5, swizzle: 0, irq: 0
[DEBUG] 02.4: group: 0, swizzle: 1, irq: 2
[DEBUG] 01.3: group: 1, swizzle: 1, irq: 2
[DEBUG] 02.1: group: 2, swizzle: 2, irq: 3
[DEBUG] 02.2: group: 1, swizzle: 2, irq: 2
[DEBUG] 02.3: group: 3, swizzle: 2, irq: 1
[DEBUG] 02.6: group: 4, swizzle: 2, irq: 1
[DEBUG] 03.1: group: 2, swizzle: 0, irq: 0
[DEBUG] 03.2: group: 5, swizzle: 0, irq: 1
[DEBUG] 03.3: group: 5, swizzle: 2, irq: 1
[DEBUG] 03.4: group: 5, swizzle: 2, irq: 1
[DEBUG] 04.1: group: 2, swizzle: 2, irq: 1
[DEBUG] 08.1: group: 3, swizzle: 2, irq: 4
[DEBUG] 08.2: group: 4, swizzle: 2, irq: 4
[DEBUG] 08.3: group: 5, swizzle: 2, irq: 4
[DEBUG] PCI_CFG IRQ: Write PCI config space IRQ assignments
[DEBUG] PCI_CFG IRQ: Finished writing PCI config space IRQ assignments

Change-Id: Id014ff3e675831eec42bc46c0a76271341e0e3e4
Signed-off-by: Nicolas Kochlowski 
---
M src/soc/amd/phoenix/pci_irq_routing.c
1 file changed, 62 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/85195/8