Change in coreboot[master]: mb/google/dedede/var/bugzzy: Initialize display signals on user mode

[SH Kim (Code Review)]

Attention is currently required from: shkim, Henry Sun, Paul Menzel, Simon Yang, Edward Doan, Karthik Ramasubramanian.
SH Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60190 )

Change subject: mb/google/dedede/var/bugzzy: Initialize display signals on user mode
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Patch Set 9:

(5 comments)

File src/mainboard/google/dedede/variants/bugzzy/ramstage.c:

https://review.coreboot.org/c/coreboot/+/60190/comment/6dffa17a_430022cc 
PS8, Line 7: #include <drivers/intel/gma/i915_reg.h>
> add one more line, not replace

Done

https://review.coreboot.org/c/coreboot/+/60190/comment/5ad729ba_b8714e62 
PS8, Line 9: #define IGD_MMIO_BASE		0xc0010000
> #define IGD_MMIO_BASE(Bus, Dev, Func) (CONFIG_MMCONF_BASE_ADDRESS + (Bus << 20) + (Dev << 15) + (Fun […]

Used 'struct device' and 'pci_read_config32' to get mmio address.

https://review.coreboot.org/c/coreboot/+/60190/comment/f61116c5_c18d5b86 
PS8, Line 27: addr32 = IGD_MMIO_BASE;
> addr32 = IGD_MMIO_BASE(0, SA_DEV_SLOT_IGD, 0);

Used 'struct device' and 'pci_read_config32' to get mmio address.

https://review.coreboot.org/c/coreboot/+/60190/comment/a19a730a_94ea9caa 
PS8, Line 29: addr32 = IGD_MMIO_BASE + 0x10;
> addr32 = IGD_MMIO_BASE(0, 2, 0) + PCI_BASE_ADDRESS_0;

Used 'struct device' and 'pci_read_config32' to get mmio address.

https://review.coreboot.org/c/coreboot/+/60190/comment/1ef88e24_61149f8f 
PS8, Line 36: 0xc7204
> PCH_PP_CONTROL

Done