Change subject: soc/intel/skylake: Enable UART debug port on S3 resume
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ic936ac2a787fdc83935103c3ce4ed8f124a97a89
Gerrit-Change-Number: 20835
Gerrit-PatchSet: 7
Gerrit-Owner: Furquan Shaikh
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Gerrit-Reviewer: Aaron Durbin
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Gerrit-Reviewer: Duncan Laurie
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Gerrit-Reviewer: Furquan Shaikh
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Gerrit-Reviewer: Lijian Zhao
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Gerrit-Reviewer: Paul Menzel
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Gerrit-Reviewer: build bot (Jenkins)
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Gerrit-Comment-Date: Tue, 01 Aug 2017 19:49:21 +0000
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