Patch set updated for coreboot: fae8935 devicetree: Change scan_bus() prototype in device ops
Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8541
-gerrit
commit fae8935ecc3ba07b0097c26e64c24d174dddf769 Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Thu Feb 26 08:37:01 2015 +0200
devicetree: Change scan_bus() prototype in device ops
The input/output value max is no longer used for tracking the bus enumeration sequence, everything is handled in the context of devicetree bus objects.
Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/device/device.c | 16 +++++---------- src/device/hypertransport.c | 4 ++-- src/device/pci_device.c | 17 ++++----------- src/device/pciexp_device.c | 4 ++-- src/device/pcix_device.c | 6 ++---- src/device/root_device.c | 24 ++++++---------------- src/include/device/device.h | 8 ++++---- src/include/device/hypertransport.h | 2 +- src/include/device/pci.h | 4 ++-- src/include/device/pciexp.h | 2 +- src/include/device/pcix.h | 3 ++- src/mainboard/emulation/qemu-i440fx/northbridge.c | 5 ++--- src/northbridge/amd/agesa/family10/northbridge.c | 8 ++------ src/northbridge/amd/agesa/family14/northbridge.c | 3 +-- src/northbridge/amd/agesa/family15/northbridge.c | 10 +++------ src/northbridge/amd/agesa/family15rl/northbridge.c | 3 +-- src/northbridge/amd/agesa/family15tn/northbridge.c | 3 +-- src/northbridge/amd/agesa/family16kb/northbridge.c | 3 +-- src/northbridge/amd/amdfam10/northbridge.c | 9 +++----- src/northbridge/amd/amdk8/northbridge.c | 9 +++----- src/northbridge/amd/pi/00730F01/northbridge.c | 3 +-- src/northbridge/intel/i3100/pciexp_porta.c | 5 +++-- src/northbridge/intel/i3100/pciexp_porta_ep80579.c | 5 +++-- src/southbridge/amd/amd8131/bridge.c | 4 ++-- src/southbridge/amd/amd8132/bridge.c | 4 ++-- src/southbridge/amd/cs5536/cs5536.c | 4 ++-- src/southbridge/intel/bd82x6x/pcie.c | 7 ++----- src/southbridge/intel/i3100/pciexp_portb.c | 5 +++-- src/southbridge/intel/i82801ix/pcie.c | 7 ++----- 29 files changed, 68 insertions(+), 119 deletions(-)
diff --git a/src/device/device.c b/src/device/device.c index b96bbfd..832b3a1 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -908,16 +908,13 @@ int reset_bus(struct bus *bus) * required, reset the bus and scan it again. * * @param busdev Pointer to the bus device. - * @param max Current bus number. - * @return The maximum bus number found, after scanning all subordinate buses. */ -static unsigned int scan_bus(struct device *busdev, unsigned int max) +static void scan_bus(struct device *busdev) { - unsigned int new_max; int do_scan_bus;
if (!busdev->enabled) - return max; + return;
printk(BIOS_SPEW, "%s scanning...\n", dev_path(busdev));
@@ -926,7 +923,7 @@ static unsigned int scan_bus(struct device *busdev, unsigned int max) do_scan_bus = 1; while (do_scan_bus) { struct bus *link; - new_max = busdev->ops->scan_bus(busdev, max); + busdev->ops->scan_bus(busdev); do_scan_bus = 0; for (link = busdev->link_list; link; link = link->next) { if (link->reset_needed) { @@ -937,20 +934,17 @@ static unsigned int scan_bus(struct device *busdev, unsigned int max) } } } - return new_max; }
void scan_bridges(struct bus *bus) { struct device *child; - unsigned int max = bus->secondary;
for (child = bus->children; child; child = child->sibling) { if (!child->ops || !child->ops->scan_bus) continue; - max = scan_bus(child, max); + scan_bus(child); } - bus->subordinate = max; }
/** @@ -994,7 +988,7 @@ void dev_enumerate(void) printk(BIOS_ERR, "dev_root missing scan_bus operation"); return; } - scan_bus(root, 0); + scan_bus(root); post_log_clear(); printk(BIOS_INFO, "done\n"); } diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c index c968af8..18214db 100644 --- a/src/device/hypertransport.c +++ b/src/device/hypertransport.c @@ -522,9 +522,9 @@ static void hypertransport_scan_chain_x(struct bus *bus, ht_unitid_base, offset_unitid); }
-unsigned int ht_scan_bridge(struct device *dev, unsigned int max) +void ht_scan_bridge(struct device *dev) { - return do_pci_scan_bridge(dev, max, hypertransport_scan_chain_x); + do_pci_scan_bridge(dev, hypertransport_scan_chain_x); }
bool ht_is_non_coherent_link(struct bus *link) diff --git a/src/device/pci_device.c b/src/device/pci_device.c index b1e2bbd..c505517 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1215,11 +1215,9 @@ static void pci_bridge_route(struct bus *link, scan_state state) * This function is the default scan_bus() method for PCI bridge devices. * * @param dev Pointer to the bridge device. - * @param max The highest bus number assigned up to now. * @param do_scan_bus TODO - * @return The maximum bus number found, after scanning all subordinate buses. */ -unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, +void do_pci_scan_bridge(struct device *dev, void (*do_scan_bus) (struct bus * bus, unsigned min_devfn, unsigned max_devfn)) @@ -1245,8 +1243,6 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, do_scan_bus(bus, 0x00, 0xff);
pci_bridge_route(bus, PCI_ROUTE_FINAL); - - return bus->subordinate; }
/** @@ -1258,12 +1254,10 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, * This function is the default scan_bus() method for PCI bridge devices. * * @param dev Pointer to the bridge device. - * @param max The highest bus number assigned up to now. - * @return The maximum bus number found, after scanning all subordinate buses. */ -unsigned int pci_scan_bridge(struct device *dev, unsigned int max) +void pci_scan_bridge(struct device *dev) { - return do_pci_scan_bridge(dev, max, pci_scan_bus); + do_pci_scan_bridge(dev, pci_scan_bus); }
/** @@ -1272,13 +1266,10 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max) * This function is the default scan_bus() method for PCI domains. * * @param dev Pointer to the domain. - * @param max The highest bus number assigned up to now. - * @return The maximum bus number found, after scanning all subordinate busses. */ -unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) +void pci_domain_scan_bus(device_t dev) { pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff); - return dev->link_list->subordinate; }
/** diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index c9dbf2f..ee78368 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -229,9 +229,9 @@ void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, } }
-unsigned int pciexp_scan_bridge(device_t dev, unsigned int max) +void pciexp_scan_bridge(device_t dev) { - return do_pci_scan_bridge(dev, max, pciexp_scan_bus); + do_pci_scan_bridge(dev, pciexp_scan_bus); }
/** Default device operations for PCI Express bridges */ diff --git a/src/device/pcix_device.c b/src/device/pcix_device.c index a20c3bf..3135642 100644 --- a/src/device/pcix_device.c +++ b/src/device/pcix_device.c @@ -112,12 +112,12 @@ const char *pcix_speed(u16 sstatus) return result; }
-unsigned int pcix_scan_bridge(device_t dev, unsigned int max) +void pcix_scan_bridge(device_t dev) { unsigned int pos; u16 sstatus;
- max = do_pci_scan_bridge(dev, max, pci_scan_bus); + do_pci_scan_bridge(dev, pci_scan_bus);
/* Find the PCI-X capability. */ pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); @@ -129,8 +129,6 @@ unsigned int pcix_scan_bridge(device_t dev, unsigned int max) /* Print the PCI-X bus speed. */ printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary, pcix_speed(sstatus)); - - return max; }
/** Default device operations for PCI-X bridges */ diff --git a/src/device/root_device.c b/src/device/root_device.c index ef34ffa..860df42 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -45,11 +45,9 @@ const char mainboard_name[] = CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_ * file under some static bus in order to be enumerated at run time. * * @param bus Pointer to the device to which the static buses are attached to. - * @param max Maximum bus number currently used before scanning. - * @return The largest bus number used. */
-static unsigned int scan_static_bus(device_t bus, unsigned int passthru) +static void scan_static_bus(device_t bus) { device_t child; struct bus *link; @@ -67,22 +65,18 @@ static unsigned int scan_static_bus(device_t bus, unsigned int passthru) child->enabled ? "enabled" : "disabled"); } } - - return passthru; }
-unsigned int scan_lpc_bus(device_t bus, unsigned int passthru) +void int scan_lpc_bus(device_t bus) { printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
- scan_static_bus(bus, 0); + scan_static_bus(bus);
printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - - return passthru; }
-unsigned int scan_smbus(device_t bus, unsigned int passthru) +void scan_smbus(device_t bus) { device_t child; struct bus *link; @@ -110,8 +104,6 @@ unsigned int scan_smbus(device_t bus, unsigned int passthru) }
printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - - return passthru; }
/** @@ -120,23 +112,19 @@ unsigned int scan_smbus(device_t bus, unsigned int passthru) * This function is the default scan_bus() method of the root device. * * @param root The root device structure. - * @param max The current bus number scanned so far, usually 0x00. - * @return The largest bus number used. */ -static unsigned int root_dev_scan_bus(device_t bus, unsigned int passthru) +static void root_dev_scan_bus(device_t bus) { struct bus *link;
printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
- scan_static_bus(bus, 0); + scan_static_bus(bus);
for (link = bus->link_list; link; link = link->next) scan_bridges(link);
printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus)); - - return passthru; }
static void root_dev_reset(struct bus *bus) diff --git a/src/include/device/device.h b/src/include/device/device.h index e1349b2..a09413f 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -46,7 +46,7 @@ struct device_operations { void (*enable_resources)(device_t dev); void (*init)(device_t dev); void (*final)(device_t dev); - unsigned int (*scan_bus)(device_t bus, unsigned int _max); + void (*scan_bus)(device_t bus); void (*enable)(device_t dev); void (*disable)(device_t dev); void (*set_link)(device_t dev, unsigned int link); @@ -227,13 +227,13 @@ void show_all_devs_resources(int debug_level, const char* msg);
extern struct device_operations default_dev_ops_root; void pci_domain_read_resources(struct device *dev); -unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max); +void pci_domain_scan_bus(struct device *dev);
void fixed_mem_resource(device_t dev, unsigned long index, unsigned long basek, unsigned long sizek, unsigned long type);
-unsigned int scan_smbus(device_t bus, unsigned int _max); -unsigned int scan_lpc_bus(device_t bus, unsigned int _max); +void scan_smbus(device_t bus); +void scan_lpc_bus(device_t bus);
/* It is the caller's responsibility to adjust regions such that ram_resource() * and mmio_resource() do not overlap. diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h index 18589d0..6767dd2 100644 --- a/src/include/device/hypertransport.h +++ b/src/include/device/hypertransport.h @@ -11,7 +11,7 @@ bool ht_is_non_coherent_link(struct bus *link);
void hypertransport_scan_chain(struct bus *bus); -unsigned int ht_scan_bridge(struct device *dev, unsigned int max); +void ht_scan_bridge(struct device *dev);
extern struct device_operations default_ht_ops_bus;
diff --git a/src/include/device/pci.h b/src/include/device/pci.h index fe31f24..bd4d85e 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -70,11 +70,11 @@ void pci_bus_enable_resources(device_t dev); void pci_bus_reset(struct bus *bus); device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn);
-unsigned int do_pci_scan_bridge(device_t bus, unsigned int max, +void do_pci_scan_bridge(device_t bus, void (*do_scan_bus)(struct bus *bus, unsigned min_devfn, unsigned max_devfn)); -unsigned int pci_scan_bridge(device_t bus, unsigned int max);
+void pci_scan_bridge(device_t bus); void pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn);
uint8_t pci_moving_config8(struct device *dev, unsigned reg); diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h index 9476088..3720202 100644 --- a/src/include/device/pciexp.h +++ b/src/include/device/pciexp.h @@ -12,7 +12,7 @@ enum aspm_type { void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn);
-unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); +void pciexp_scan_bridge(device_t dev);
extern struct device_operations default_pciexp_ops_bus;
diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index 75be7aa..024c548 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -2,7 +2,8 @@ #define DEVICE_PCIX_H /* (c) 2005 Linux Networx GPL see COPYING for details */
-unsigned int pcix_scan_bridge(device_t dev, unsigned int max); +void pcix_scan_bridge(device_t dev); + const char *pcix_speed(u16 sstatus);
extern struct device_operations default_pcix_ops_bus; diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index 05104dd..fcc5452 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -236,14 +236,14 @@ static void cpu_bus_init(device_t dev) initialize_cpus(dev->link_list); }
-static unsigned int cpu_bus_scan(device_t bus, unsigned int passthru) +static void cpu_bus_scan(device_t bus) { int max_cpus = fw_cfg_max_cpus(); device_t cpu; int i;
if (max_cpus < 0) - return 0; + return;
/* * TODO: This only handles the simple "qemu -smp $nr" case @@ -256,7 +256,6 @@ static unsigned int cpu_bus_scan(device_t bus, unsigned int passthru) if (cpu) set_cpu_topology(cpu, 1, 0, i, 0); } - return max_cpus; }
static struct device_operations cpu_bus_ops = { diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 5589ba8..57854d8 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -554,7 +554,7 @@ static void mcf0_control_init(struct device *dev) { }
-static unsigned amdfam10_scan_chains(device_t dev, unsigned max) +static void amdfam10_scan_chains(device_t dev) { unsigned nodeid; struct bus *link; @@ -575,10 +575,7 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); } } - max = dev->bus->subordinate; } - - return max; }
static struct device_operations northbridge_operations = { @@ -1007,7 +1004,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; }
-static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1183,7 +1180,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; }
static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 7639bf6..05c74e3 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -765,7 +765,7 @@ static void domain_enable_resources(device_t dev)
/* Bus related code */
-static u32 cpu_bus_scan(struct device *dev, u32 passthru) +static void cpu_bus_scan(struct device *dev) { struct bus *cpu_bus = dev->link_list; device_t cpu; @@ -784,7 +784,6 @@ static u32 cpu_bus_scan(struct device *dev, u32 passthru) if (cpu) amd_cpu_topology(cpu, 0, apic_id); } - return passthru; }
static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 6094f29..6369d01 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -459,7 +459,7 @@ static void nb_set_resources(device_t dev) } }
-static unsigned scan_chains(device_t dev, unsigned max) +static void scan_chains(device_t dev) { unsigned nodeid; struct bus *link; @@ -479,9 +479,7 @@ static unsigned scan_chains(device_t dev, unsigned max) pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7); } } - max = dev->bus->subordinate; } - return max; }
@@ -960,10 +958,9 @@ static void domain_set_resources(device_t dev) }
/* all family15's pci devices are under 0x18.0, so we search from dev 0x18 fun 0 */ -static unsigned int f15_pci_domain_scan_bus(device_t dev, unsigned int max) +static void f15_pci_domain_scan_bus(device_t dev) { pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff); - return dev->link_list->subordinate; }
static struct device_operations pci_domain_ops = { @@ -1017,7 +1014,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; }
-static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1193,7 +1190,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; }
static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c index 2782c18..2580f43 100644 --- a/src/northbridge/amd/agesa/family15rl/northbridge.c +++ b/src/northbridge/amd/agesa/family15rl/northbridge.c @@ -1004,7 +1004,7 @@ static void add_more_links(struct device *dev, unsigned total_links) last->next = NULL; }
-static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1178,7 +1178,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; }
static void cpu_bus_init(struct device *dev) diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index c293c79..5b25b63 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -1002,7 +1002,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; }
-static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1176,7 +1176,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; }
static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 3801688..8ce427a 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -1020,7 +1020,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; }
-static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1194,7 +1194,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; }
static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 57d4412..f4891b2 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -264,7 +264,7 @@ static void trim_ht_chain(struct device *dev) } }
-static unsigned amdfam10_scan_chains(device_t dev, unsigned max) +static void amdfam10_scan_chains(device_t dev) { struct bus *link;
@@ -274,7 +274,6 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) if (link->ht_link_up) amdfam10_scan_chain(link); } - return dev->bus->subordinate; }
@@ -903,7 +902,7 @@ static void amdfam10_domain_set_resources(device_t dev) } }
-static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) +static void amdfam10_domain_scan_bus(device_t dev) { u32 reg; int i; @@ -938,7 +937,6 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return dev->bus->subordinate; }
static struct device_operations pci_domain_ops = { @@ -1029,7 +1027,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; }
-static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1198,7 +1196,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; }
static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index c9f4d4c..5c06df7 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -238,7 +238,7 @@ static void trim_ht_chain(struct device *dev) } }
-static unsigned amdk8_scan_chains(device_t dev, unsigned max) +static void amdk8_scan_chains(device_t dev) { struct bus *link;
@@ -248,7 +248,6 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned max) if (link->ht_link_up) amdk8_scan_chain(link); } - return dev->bus->subordinate; }
@@ -1111,7 +1110,7 @@ static void amdk8_domain_set_resources(device_t dev)
}
-static u32 amdk8_domain_scan_bus(device_t dev, u32 max) +static void amdk8_domain_scan_bus(device_t dev) { u32 reg; int i; @@ -1142,7 +1141,6 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 max) pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc); } } - return dev->link_list->subordinate; }
static struct device_operations pci_domain_ops = { @@ -1191,7 +1189,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; }
-static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t devx) { struct bus *cpu_bus; device_t dev_mc; @@ -1330,7 +1328,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; }
static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index f748e8f..40f77ed 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -1013,7 +1013,7 @@ static void add_more_links(device_t dev, unsigned total_links) last->next = NULL; }
-static u32 cpu_bus_scan(device_t dev, u32 passthru) +static void cpu_bus_scan(device_t dev) { struct bus *cpu_bus; device_t dev_mc; @@ -1199,7 +1199,6 @@ static u32 cpu_bus_scan(device_t dev, u32 passthru) amd_cpu_topology(cpu, i, j); } //j } - return passthru; }
static void cpu_bus_init(device_t dev) diff --git a/src/northbridge/intel/i3100/pciexp_porta.c b/src/northbridge/intel/i3100/pciexp_porta.c index 2fa162f..35caa61 100644 --- a/src/northbridge/intel/i3100/pciexp_porta.c +++ b/src/northbridge/intel/i3100/pciexp_porta.c @@ -45,7 +45,7 @@ static void pcie_init(struct device *dev)
}
-static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -62,7 +62,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); }
static struct device_operations pcie_ops = { diff --git a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c index c0a4d3d..cea4012 100644 --- a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c +++ b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c @@ -67,7 +67,7 @@ static void pcie_bus_enable_resources(struct device *dev) }
-static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -84,7 +84,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); }
static struct device_operations pcie_ops = { diff --git a/src/southbridge/amd/amd8131/bridge.c b/src/southbridge/amd/amd8131/bridge.c index cb76980..1587268 100644 --- a/src/southbridge/amd/amd8131/bridge.c +++ b/src/southbridge/amd/amd8131/bridge.c @@ -265,9 +265,9 @@ static void amd8131_scan_bus(struct bus *bus, } }
-static unsigned int amd8131_scan_bridge(device_t dev, unsigned int max) +static void amd8131_scan_bridge(device_t dev) { - return do_pci_scan_bridge(dev, max, amd8131_scan_bus); + do_pci_scan_bridge(dev, amd8131_scan_bus); }
diff --git a/src/southbridge/amd/amd8132/bridge.c b/src/southbridge/amd/amd8132/bridge.c index 5df315d..94b917e 100644 --- a/src/southbridge/amd/amd8132/bridge.c +++ b/src/southbridge/amd/amd8132/bridge.c @@ -194,9 +194,9 @@ static void amd8132_scan_bus(struct bus *bus, amd8132_walk_children(bus, amd8132_pcix_tune_dev, &info); }
-static unsigned int amd8132_scan_bridge(device_t dev, unsigned int max) +static void amd8132_scan_bridge(device_t dev) { - return do_pci_scan_bridge(dev, max, amd8132_scan_bus); + do_pci_scan_bridge(dev, amd8132_scan_bus); }
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index dd0ff0f..0ca485b 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -688,10 +688,10 @@ static struct smbus_bus_operations lops_smbus_bus = { .read_byte = lsmbus_read_byte, };
-static unsigned int scan_lpc_smbus(device_t dev, unsigned int max) +static void scan_lpc_smbus(device_t dev) { /* FIXME. Do we have mixed LPC/SMBus device node here. */ - return scan_smbus(dev, max); + scan_smbus(dev); }
static struct device_operations southbridge_ops = { diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c index 4769dd5..36e24e3 100644 --- a/src/southbridge/intel/bd82x6x/pcie.c +++ b/src/southbridge/intel/bd82x6x/pcie.c @@ -273,13 +273,12 @@ static void pch_pcie_enable(device_t dev) pch_pcie_pm_early(dev); }
-static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max) +static void unsigned int pch_pciexp_scan_bridge(device_t dev) { - unsigned int ret; struct southbridge_intel_bd82x6x_config *config = dev->chip_info;
/* Normal PCIe Scan */ - ret = pciexp_scan_bridge(dev, max); + pciexp_scan_bridge(dev);
if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) { intel_acpi_pcie_hotplug_scan_slot(dev->link_list); @@ -287,8 +286,6 @@ static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)
/* Late Power Management init after bridge device enumeration */ pch_pcie_pm_late(dev); - - return ret; }
static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device) diff --git a/src/southbridge/intel/i3100/pciexp_portb.c b/src/southbridge/intel/i3100/pciexp_portb.c index ff0bce5..9f65a27 100644 --- a/src/southbridge/intel/i3100/pciexp_portb.c +++ b/src/southbridge/intel/i3100/pciexp_portb.c @@ -39,7 +39,7 @@ static void pcie_init(struct device *dev) { }
-static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) +static void pcie_scan_bridge(struct device *dev) { u16 val; u16 ctl; @@ -56,7 +56,8 @@ static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max) hard_reset(); } } while (val & (3<<10)); - return pciexp_scan_bridge(dev, max); + + pciexp_scan_bridge(dev); }
static struct device_operations pcie_ops = { diff --git a/src/southbridge/intel/i82801ix/pcie.c b/src/southbridge/intel/i82801ix/pcie.c index 7583715..e4cb0d9 100644 --- a/src/southbridge/intel/i82801ix/pcie.c +++ b/src/southbridge/intel/i82801ix/pcie.c @@ -110,19 +110,16 @@ static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device) } }
-static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max) +static void pch_pciexp_scan_bridge(device_t dev) { - unsigned int ret; struct southbridge_intel_i82801ix_config *config = dev->chip_info;
/* Normal PCIe Scan */ - ret = pciexp_scan_bridge(dev, max); + pciexp_scan_bridge(dev);
if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) { intel_acpi_pcie_hotplug_scan_slot(dev->link_list); } - - return ret; }
static struct pci_operations pci_ops = {
-
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