Change in coreboot[master]: soc/intel/denverton_ns: Convert to ASL 2.0 syntax - coreboot-gerrit

9 Oct 2020

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46240 )
Change subject: soc/intel/denverton_ns: Convert to ASL 2.0 syntax
......................................................................
soc/intel/denverton_ns: Convert to ASL 2.0 syntax
Change-Id: I261add8142c3192ab944845e8e1a362a3aca00c8
Signed-off-by: Elyes HAOUAS ehaouas@noos.fr
---
M src/soc/intel/denverton_ns/acpi/globalnvs.asl
M src/soc/intel/denverton_ns/acpi/irqlinks.asl
M src/soc/intel/denverton_ns/acpi/northcluster.asl
M src/soc/intel/denverton_ns/acpi/southcluster.asl
4 files changed, 66 insertions(+), 66 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46240/1

diff --git a/src/soc/intel/denverton_ns/acpi/globalnvs.asl b/src/soc/intel/denverton_ns/acpi/globalnvs.asl
index f858cdf..7ce6c7a 100644
--- a/src/soc/intel/denverton_ns/acpi/globalnvs.asl
+++ b/src/soc/intel/denverton_ns/acpi/globalnvs.asl
@@ -62,27 +62,27 @@
 /* Set flag to enable USB charging in S3 */
 Method (S3UE)
 {
-	Store (One, \S3U0)
-	Store (One, \S3U1)
+	\S3U0 = 1
+	\S3U1 = 1
 }
/* Set flag to disable USB charging in S3 */
 Method (S3UD)
 {
-	Store (Zero, \S3U0)
-	Store (Zero, \S3U1)
+	\S3U0 = 0
+	\S3U1 = 0
 }
/* Set flag to enable USB charging in S5 */
 Method (S5UE)
 {
-	Store (One, \S5U0)
-	Store (One, \S5U1)
+	\S5U0 = 1
+	\S5U1 = 1
 }
/* Set flag to disable USB charging in S5 */
 Method (S5UD)
 {
-	Store (Zero, \S5U0)
-	Store (Zero, \S5U1)
+	\S5U0 = 0
+	\S5U1 = 0
 }
diff --git a/src/soc/intel/denverton_ns/acpi/irqlinks.asl b/src/soc/intel/denverton_ns/acpi/irqlinks.asl
index e62d84d..ef076bc 100644
--- a/src/soc/intel/denverton_ns/acpi/irqlinks.asl
+++ b/src/soc/intel/denverton_ns/acpi/irqlinks.asl
@@ -8,7 +8,7 @@
    // Disable method
    Method (_DIS, 0, Serialized)
    {
-		Store (0x80, PRTA)
+		PRTA = 0x80
    }
// Possible Resource Settings for this Link
@@ -28,10 +28,10 @@
    	CreateWordField(RTLA, 1, IRQ0)
// Clear the WordField
-		Store (Zero, IRQ0)
+		IRQ0 = 0
// Set the bit from PRTA
-		ShiftLeft(1, And(PRTA, 0x0f), IRQ0)
+		IRQ0 = 1 << (PRTA & 0x0f)
Return (RTLA)
    }
@@ -44,14 +44,14 @@
    	// Which bit is set?
    	FindSetRightBit(IRQ0, Local0)
-		Decrement(Local0)
-		Store(Local0, PRTA)
+		Local0--
+		PRTA = Local0
    }
// Status
    Method (_STA, 0, Serialized)
    {
-		If(And(PRTA, 0x80)) {
+		If (PRTA & 0x80) {
    		Return (0x9)
    	} Else {
    		Return (0xb)
@@ -67,7 +67,7 @@
    // Disable method
    Method (_DIS, 0, Serialized)
    {
-		Store (0x80, PRTB)
+		PRTB = 0x80
    }
// Possible Resource Settings for this Link
@@ -87,10 +87,10 @@
    	CreateWordField(RTLB, 1, IRQ0)
// Clear the WordField
-		Store (Zero, IRQ0)
+		IRQ0 = 0
// Set the bit from PRTB
-		ShiftLeft(1, And(PRTB, 0x0f), IRQ0)
+		IRQ0 = 1 << (PRTB & 0x0f)
Return (RTLB)
    }
@@ -103,14 +103,14 @@
    	// Which bit is set?
    	FindSetRightBit(IRQ0, Local0)
-		Decrement(Local0)
-		Store(Local0, PRTB)
+		Local0--
+		PRTB = Local0
    }
// Status
    Method (_STA, 0, Serialized)
    {
-		If(And(PRTB, 0x80)) {
+		If (PRTB & 0x80) {
    		Return (0x9)
    	} Else {
    		Return (0xb)
@@ -126,7 +126,7 @@
    // Disable method
    Method (_DIS, 0, Serialized)
    {
-		Store (0x80, PRTC)
+		PRTC = 0x80
    }
// Possible Resource Settings for this Link
@@ -146,10 +146,10 @@
    	CreateWordField(RTLC, 1, IRQ0)
// Clear the WordField
-		Store (Zero, IRQ0)
+		IRQ0 = 0
// Set the bit from PRTC
-		ShiftLeft(1, And(PRTC, 0x0f), IRQ0)
+		IRQ0 = 1 << (PRTC & 0x0f)
Return (RTLC)
    }
@@ -162,14 +162,14 @@
    	// Which bit is set?
    	FindSetRightBit(IRQ0, Local0)
-		Decrement(Local0)
-		Store(Local0, PRTC)
+		Local0--
+		PRTC = Local0
    }
// Status
    Method (_STA, 0, Serialized)
    {
-		If(And(PRTC, 0x80)) {
+		If (PRTC & 0x80) {
    		Return (0x9)
    	} Else {
    		Return (0xb)
@@ -185,7 +185,7 @@
    // Disable method
    Method (_DIS, 0, Serialized)
    {
-		Store (0x80, PRTD)
+		PRTD = 0x80
    }
// Possible Resource Settings for this Link
@@ -205,10 +205,10 @@
    	CreateWordField(RTLD, 1, IRQ0)
// Clear the WordField
-		Store (Zero, IRQ0)
+		IRQ0 = 0
// Set the bit from PRTD
-		ShiftLeft(1, And(PRTD, 0x0f), IRQ0)
+		IRQ0 = 1 << (PRTD & 0x0f)
Return (RTLD)
    }
@@ -221,14 +221,14 @@
    	// Which bit is set?
    	FindSetRightBit(IRQ0, Local0)
-		Decrement(Local0)
-		Store(Local0, PRTD)
+		Local0--
+		PRTD = Local0
    }
// Status
    Method (_STA, 0, Serialized)
    {
-		If(And(PRTD, 0x80)) {
+		If (PRTD & 0x80) {
    		Return (0x9)
    	} Else {
    		Return (0xb)
@@ -244,7 +244,7 @@
    // Disable method
    Method (_DIS, 0, Serialized)
    {
-		Store (0x80, PRTE)
+		PRTE = 0x80
    }
// Possible Resource Settings for this Link
@@ -264,10 +264,10 @@
    	CreateWordField(RTLE, 1, IRQ0)
// Clear the WordField
-		Store (Zero, IRQ0)
+		IRQ0 = 0
// Set the bit from PRTE
-		ShiftLeft(1, And(PRTE, 0x0f), IRQ0)
+		IRQ0 = 1 << (PRTE & 0x0f)
Return (RTLE)
    }
@@ -280,14 +280,14 @@
    	// Which bit is set?
    	FindSetRightBit(IRQ0, Local0)
-		Decrement(Local0)
-		Store(Local0, PRTE)
+		Local0--
+		PRTE = Local0
    }
// Status
    Method (_STA, 0, Serialized)
    {
-		If(And(PRTE, 0x80)) {
+		If (PRTE & 0x80) {
    		Return (0x9)
    	} Else {
    		Return (0xb)
@@ -303,7 +303,7 @@
    // Disable method
    Method (_DIS, 0, Serialized)
    {
-		Store (0x80, PRTF)
+		PRTF = 0x80
    }
// Possible Resource Settings for this Link
@@ -323,10 +323,10 @@
    	CreateWordField(RTLF, 1, IRQ0)
// Clear the WordField
-		Store (Zero, IRQ0)
+		IRQ0 = 0
// Set the bit from PRTF
-		ShiftLeft(1, And(PRTF, 0x0f), IRQ0)
+		IRQ0 = 1 << (PRTF & 0x0f)
Return (RTLF)
    }
@@ -339,14 +339,14 @@
    	// Which bit is set?
    	FindSetRightBit(IRQ0, Local0)
-		Decrement(Local0)
-		Store(Local0, PRTF)
+		Local0--
+		PRTF = Local0
    }
// Status
    Method (_STA, 0, Serialized)
    {
-		If(And(PRTF, 0x80)) {
+		If (PRTF & 0x80) {
    		Return (0x9)
    	} Else {
    		Return (0xb)
@@ -362,7 +362,7 @@
    // Disable method
    Method (_DIS, 0, Serialized)
    {
-		Store (0x80, PRTG)
+		PRTG = 0x80
    }
// Possible Resource Settings for this Link
@@ -382,10 +382,10 @@
    	CreateWordField(RTLG, 1, IRQ0)
// Clear the WordField
-		Store (Zero, IRQ0)
+		IRQ0 = 0
// Set the bit from PRTG
-		ShiftLeft(1, And(PRTG, 0x0f), IRQ0)
+		IRQ0 = 1 << (PRTG & 0x0f)
Return (RTLG)
    }
@@ -398,14 +398,14 @@
    	// Which bit is set?
    	FindSetRightBit(IRQ0, Local0)
-		Decrement(Local0)
-		Store(Local0, PRTG)
+		Local0--
+		PRTG = Local0
    }
// Status
    Method (_STA, 0, Serialized)
    {
-		If(And(PRTG, 0x80)) {
+		If (PRTG & 0x80) {
    		Return (0x9)
    	} Else {
    		Return (0xb)
@@ -421,7 +421,7 @@
    // Disable method
    Method (_DIS, 0, Serialized)
    {
-		Store (0x80, PRTH)
+		PRTH = 0x80
    }
// Possible Resource Settings for this Link
@@ -441,10 +441,10 @@
    	CreateWordField(RTLH, 1, IRQ0)
// Clear the WordField
-		Store (Zero, IRQ0)
+		IRQ0 = 0
// Set the bit from PRTH
-		ShiftLeft(1, And(PRTH, 0x0f), IRQ0)
+		IRQ0 = 1 << (PRTH & 0x0f)
Return (RTLH)
    }
@@ -457,14 +457,14 @@
    	// Which bit is set?
    	FindSetRightBit(IRQ0, Local0)
-		Decrement(Local0)
-		Store(Local0, PRTH)
+		Local0--
+		PRTH = Local0
    }
// Status
    Method (_STA, 0, Serialized)
    {
-		If(And(PRTH, 0x80)) {
+		If (PRTH & 0x80) {
    		Return (0x9)
    	} Else {
    		Return (0xb)
diff --git a/src/soc/intel/denverton_ns/acpi/northcluster.asl b/src/soc/intel/denverton_ns/acpi/northcluster.asl
index e1d1e40..40d745e 100644
--- a/src/soc/intel/denverton_ns/acpi/northcluster.asl
+++ b/src/soc/intel/denverton_ns/acpi/northcluster.asl
@@ -97,9 +97,9 @@
    CreateDwordField(MCRS, ^PM01._LEN, PLEN)
// MMIO Low is saved in NVS
-	Store (\MMOB, PMIN)
-	Store (\MMOL, PMAX)
-	Add (Subtract (PMAX, PMIN), 1, PLEN)
+	PMIN = \MMOB
+	PMAX = \MMOL
+	PLEN = PMAX - PMIN + 1
// Find PCI resource area in MCRS
    CreateQWordField(MCRS, ^PM02._MIN, P2MN)
@@ -107,9 +107,9 @@
    CreateQWordField(MCRS, ^PM02._LEN, P2LN)
// MMIO High is saved in NVS
-	Store(\MMHB, P2MN)
-	Store(\MMHL, P2MX)
-	Add(Subtract(P2MX,P2MN),1,P2LN)
+	P2MN = \MMHB
+	P2MX = \MMHL
+	P2LN = P2MX - P2MN +1
Return (MCRS)
 }	// End _CRS
@@ -132,9 +132,9 @@
    {
    	// Fix up 32-bit TSEG
    	CreateDWordField(PDRS, ^TSMB._BAS, TSMN)
-		Store(\TSGB, TSMN)
+		TSMN = \TSGB
    	CreateDWordField(PDRS, ^TSMB._LEN, TSLN)
-		Store(\TSSZ, TSLN)
+		TSLN = \TSSZ
    	Return(PDRS)
    }
 }
diff --git a/src/soc/intel/denverton_ns/acpi/southcluster.asl b/src/soc/intel/denverton_ns/acpi/southcluster.asl
index 68f55f2..72e12bd 100644
--- a/src/soc/intel/denverton_ns/acpi/southcluster.asl
+++ b/src/soc/intel/denverton_ns/acpi/southcluster.asl
@@ -128,7 +128,7 @@
 Method (_OSC, 4)
 {
    /* Check for proper GUID */
-	If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
+	If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
    {
    	/* Let OS control everything */
    	Return (Arg3)
@@ -137,7 +137,7 @@
    {
    	/* Unrecognized UUID */
    	CreateDWordField (Arg3, 0, CDW1)
-		Or (CDW1, 4, CDW1)
+		CDW1 |= 4
    	Return (Arg3)
    }
 }
-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I261add8142c3192ab944845e8e1a362a3aca00c8
Gerrit-Change-Number: 46240
Gerrit-PatchSet: 1
Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr
Gerrit-Reviewer: David Guckian david.guckian@intel.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Vanessa Eusebio vanessa.f.eusebio@intel.com
Gerrit-MessageType: newchange



    