Change in coreboot[master]: soc/intel/jasperlake: Fill software noise mitigation related UPDs

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47879 )

Change subject: soc/intel/jasperlake: Fill software noise mitigation related UPDs
......................................................................

soc/intel/jasperlake: Fill software noise mitigation related UPDs

Purpose of this patch is to expose and fill software noise
mitigation related parameters from coreboot so that
we can fine tune noise mitigation

This is work in progress patch and final patchset will allow
values to be filled from devietree once values are finalized

BUG=NONE
BRANCH=NONE
TEST=code compiles and UPDs are updated

Change-Id: Id022f32acc3fd3fe62f78e3053bacdeb33727c02
Signed-off-by: Maulik V Vaghela 
---
M src/soc/intel/jasperlake/fsp_params.c
1 file changed, 19 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/47879/1

diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index 92c35c6..a76bea3 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -236,6 +236,25 @@
    			config->PchPmSlpS3MinAssert, config->PchPmSlpAMinAssert,
    			config->PchPmPwrCycDur);

+	/* Disable Fast slew rate for Deeper C states */
+	/* Note that each index is for specific VR */
+	params->FastPkgCRampDisable[0] = 0x00;
+	params->FastPkgCRampDisable[1] = 0x00;
+	params->FastPkgCRampDisable[2] = 0x00;
+	params->FastPkgCRampDisable[3] = 0x00;
+	params->FastPkgCRampDisable[4] = 0x00;
+
+	params->SlowSlewRate[0] = 0x00;
+	params->SlowSlewRate[1] = 0x00;
+	params->SlowSlewRate[2] = 0x00;
+	params->SlowSlewRate[3] = 0x00;
+	params->SlowSlewRate[4] = 0x00;
+
+	params->AcousticNoiseMitigation = 0x00;
+	params->PreWake = 0x00;
+	params->RampUp = 0x00;
+	params->RampDown = 0x00;
+
    /* Override/Fill FSP Silicon Param for mainboard */
    mainboard_silicon_init_params(params);
 }

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has removed Patrick Rudolph from this change.  ( https://review.coreboot.org/c/coreboot/+/47879 )

Change subject: soc/intel/jasperlake: Fill software noise mitigation related UPDs
......................................................................

Removed reviewer Patrick Rudolph.

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47879 )

Change subject: soc/intel/jasperlake: Fill software noise mitigation related UPDs
......................................................................

Patch Set 1:

(3 comments)

https://review.coreboot.org/c/coreboot/+/47879/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47879/1//COMMIT_MSG@9 
PS1, Line 9: Purpose of this patch is to expose and fill software noise
           : mitigation related parameters from coreboot so that
           : we can fine tune noise mitigation
1.  Please re-flow for 75 characters per line.
2.  Please add a dot/period at the end of sentences.

https://review.coreboot.org/c/coreboot/+/47879/1//COMMIT_MSG@14 
PS1, Line 14: devietree
devicetree

https://review.coreboot.org/c/coreboot/+/47879/1//COMMIT_MSG@13 
PS1, Line 13: This is work in progress patch and final patchset will allow
            : values to be filled from devietree once values are finalized
Ditto regarding missing dot/period.

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47879 )

Change subject: soc/intel/jasperlake: Fill software noise mitigation related UPDs
......................................................................

Patch Set 3:

(3 comments)

This change is ready for review.

https://review.coreboot.org/c/coreboot/+/47879/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/47879/1//COMMIT_MSG@9 
PS1, Line 9: Purpose of this patch is to expose and fill software noise
           : mitigation related parameters from coreboot so that
           : we can fine tune noise mitigation
> Please re-flow for 75 characters per line. […]

Done

https://review.coreboot.org/c/coreboot/+/47879/1//COMMIT_MSG@13 
PS1, Line 13: This is work in progress patch and final patchset will allow
            : values to be filled from devietree once values are finalized
> Ditto regarding missing dot/period.

Done

https://review.coreboot.org/c/coreboot/+/47879/1//COMMIT_MSG@14 
PS1, Line 14: devietree
> devicetree

Done

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has removed Patrick Rudolph from this change.  ( https://review.coreboot.org/c/coreboot/+/47879 )

Change subject: soc/intel/jasperlake: Fill software noise mitigation related UPDs
......................................................................

Removed reviewer Patrick Rudolph.

Change in coreboot[master]: soc/intel/jasperlake: Add Acoustic noise mitigation configuration

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47879 )

Change subject: soc/intel/jasperlake: Add Acoustic noise mitigation configuration
......................................................................

Set Ready For Review

Change in coreboot[master]: soc/intel/jasperlake: Add Acoustic noise mitigation configuration

[Maulik V Vaghela (Code Review)]

Hello build bot (Jenkins), Chen Wisley, Meera Ravindranath, Ronak Kanabar, Patrick Rudolph, Karthik Ramasubramanian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47879

to look at the new patch set (#5).

Change subject: soc/intel/jasperlake: Add Acoustic noise mitigation configuration
......................................................................

soc/intel/jasperlake: Add Acoustic noise mitigation configuration

This patch exposes acoustic noise mitigation related UPDs/configuration
to be filled from devicetree.
For each variant, we might have different values for various parameters.
Filling it from devicetree will allow us to fill separate values for
each board/variant.

Note that since JasperLake only has one VR, we're only filling index 0
for slew rate and FastPkgCRampDisable.

BUG=b:162192346
BRANCH=dedede
TEST=code compilation is successful and values from devicetree are
getting reflected in UPDs

Change-Id: Id022f32acc3fd3fe62f78e3053bacdeb33727c02
Signed-off-by: Maulik V Vaghela 
---
M src/soc/intel/jasperlake/chip.h
M src/soc/intel/jasperlake/fsp_params.c
2 files changed, 53 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/47879/5

Change in coreboot[master]: soc/intel/jasperlake: Add Acoustic noise mitigation configuration

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47879 )

Change subject: soc/intel/jasperlake: Add Acoustic noise mitigation configuration
......................................................................

Patch Set 6: Code-Review+2

Change in coreboot[master]: soc/intel/jasperlake: Add Acoustic noise mitigation configuration

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47879 )

Change subject: soc/intel/jasperlake: Add Acoustic noise mitigation configuration
......................................................................

soc/intel/jasperlake: Add Acoustic noise mitigation configuration

This patch exposes acoustic noise mitigation related UPDs/configuration
to be filled from devicetree.
For each variant, we might have different values for various parameters.
Filling it from devicetree will allow us to fill separate values for
each board/variant.

Note that since JasperLake only has one VR, we're only filling index 0
for slew rate and FastPkgCRampDisable.

BUG=b:162192346
BRANCH=dedede
TEST=code compilation is successful and values from devicetree are
getting reflected in UPDs

Change-Id: Id022f32acc3fd3fe62f78e3053bacdeb33727c02
Signed-off-by: Maulik V Vaghela 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47879
Tested-by: build bot (Jenkins) 
Reviewed-by: Karthik Ramasubramanian 
---
M src/soc/intel/jasperlake/chip.h
M src/soc/intel/jasperlake/fsp_params.c
2 files changed, 53 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 0ed4205..2fc32c9 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -359,6 +359,51 @@
     * Range: 0.0% to 10.0% (0-100)
     */
    uint8_t FivrSpreadSpectrum;
+
+	/*
+	 * Disable Fast Slew Rate for Deep Package C States for VR domains
+	 * Disable Fast Slew Rate for Deep Package C States based on
+	 * Acoustic Noise Mitigation feature enabled.
+	 */
+	uint8_t FastPkgCRampDisable;
+
+	/*
+	 * Slew Rate configuration for Deep Package C States for VR domains
+	 * based on Acoustic Noise Mitigation feature enabled.
+	 * 0: Fast/2 ; 1: Fast/4; 2: Fast/8; 3: Fast/16
+	 */
+	uint8_t SlowSlewRate;
+
+	/*
+	 * Enable or Disable Acoustic Noise Mitigation feature.
+	 * 0: Disabled ; 1: Enabled
+	 */
+	uint8_t AcousticNoiseMitigation;
+
+	/*
+	 * Acoustic Noise Mitigation Range.Defines the maximum Pre-Wake
+	 * randomization time in micro ticks.This can be programmed only
+	 * if AcousticNoiseMitigation is enabled.
+	 * Range 0-255
+	 */
+	uint8_t PreWake;
+
+	/*
+	 * Acoustic Noise Mitigation Range.Defines the maximum Ramp Up
+	 * randomization time in micro ticks.This can be programmed only
+	 * if AcousticNoiseMitigation is enabled.
+	 * Range 0-255
+	 */
+	uint8_t RampUp;
+
+	/*
+	 * Acoustic Noise Mitigation Range.Defines the maximum Ramp Down
+	 * randomization time in micro ticks.This can be programmed only
+	 * if AcousticNoiseMitigation is enabled.
+	 * Range 0-255
+	 */
+	uint8_t RampDown;
+
 };

typedef struct soc_intel_jasperlake_config config_t;
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index 92c35c6..c03e9dd 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -236,6 +236,14 @@
    			config->PchPmSlpS3MinAssert, config->PchPmSlpAMinAssert,
    			config->PchPmPwrCycDur);

+	/* Fill Acoustic noise mitigation related configuration */
+	params->FastPkgCRampDisable[0] = config->FastPkgCRampDisable;
+	params->SlowSlewRate[0] = config->SlowSlewRate;
+	params->AcousticNoiseMitigation = config->AcousticNoiseMitigation;
+	params->PreWake = config->PreWake;
+	params->RampUp = config->RampUp;
+	params->RampDown = config->RampDown;
+
    /* Override/Fill FSP Silicon Param for mainboard */
    mainboard_silicon_init_params(params);
 }