Change in coreboot[master]: soc/amd: Fix most checkpatch errors

[Marshall Dawson (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

https://review.coreboot.org/19986

to look at the new patch set (#2).

Change subject: soc/amd: Fix most checkpatch errors
......................................................................

soc/amd: Fix most checkpatch errors

Correct the majority of reported errors and mark most of the
remaining ones as todo.  (Some of the lines requiring a >80
break are indented too much currently.)  Some of the alignment
in hudson.h still causes checkpatch errors, but this is
intentionally left as-is.  Changes to agesawrapper.c cause the
build to change, so this file is also left as-is.

Also make other misc. changes, e.g. consistency in lower-case
for hex values, using defined values, etc.

These changes were confirmed to cause no changes in a Gardenia
build.  No other improvements were made, e.g. changing to helper
functions, or converting functions like __outbyte().

Change-Id: I768884a4c4b9505e77f5d6bfde37797520878912
Signed-off-by: Marshall Dawson 
---
M src/soc/amd/common/BiosCallOuts.h
M src/soc/amd/common/agesawrapper.h
M src/soc/amd/common/agesawrapper_call.h
M src/soc/amd/common/amd_pci_util.c
M src/soc/amd/common/amd_pci_util.h
M src/soc/amd/common/cache_as_ram.inc
M src/soc/amd/common/def_callouts.c
M src/soc/amd/common/dimmSpd.h
M src/soc/amd/common/heapmanager.c
M src/soc/amd/common/spi.c
M src/soc/amd/stoneyridge/acpi/fch.asl
M src/soc/amd/stoneyridge/acpi/lpc.asl
M src/soc/amd/stoneyridge/acpi/northbridge.asl
M src/soc/amd/stoneyridge/acpi/pci_int.asl
M src/soc/amd/stoneyridge/acpi/pcie.asl
M src/soc/amd/stoneyridge/acpi/usb.asl
M src/soc/amd/stoneyridge/bootblock/bootblock.c
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/chip.h
M src/soc/amd/stoneyridge/dimmSpd.c
M src/soc/amd/stoneyridge/early_setup.c
M src/soc/amd/stoneyridge/enable_usbdebug.c
M src/soc/amd/stoneyridge/fadt.c
M src/soc/amd/stoneyridge/fixme.c
M src/soc/amd/stoneyridge/gpio.c
M src/soc/amd/stoneyridge/hudson.c
M src/soc/amd/stoneyridge/imc.c
M src/soc/amd/stoneyridge/include/amd_pci_int_defs.h
M src/soc/amd/stoneyridge/include/amd_pci_int_types.h
M src/soc/amd/stoneyridge/include/soc/gpio.h
M src/soc/amd/stoneyridge/include/soc/hudson.h
M src/soc/amd/stoneyridge/include/soc/pci_devs.h
M src/soc/amd/stoneyridge/include/soc/smbus.h
M src/soc/amd/stoneyridge/lpc.c
M src/soc/amd/stoneyridge/model_15_init.c
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/reset.c
M src/soc/amd/stoneyridge/sata.c
M src/soc/amd/stoneyridge/sd.c
M src/soc/amd/stoneyridge/smbus.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/amd/stoneyridge/smihandler.c
M src/soc/amd/stoneyridge/uart.c
43 files changed, 801 insertions(+), 670 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/19986/2