Change in coreboot[master]: mb/google/hatch: Set FPS as wake source

[Shelley Chen (Code Review)]

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35903 )

Change subject: mb/google/hatch: Set FPS as wake source
......................................................................

mb/google/hatch: Set FPS as wake source

BUG=b:142131099
BRANCH=None
TEST=powerd_dbus_suspend, ensure DUT in S0ix
     touch fp sensor and ensure DUT wakes up in S0

Change-Id: If57094aa1076d79ac0886b71fa5532411bfeb45f
Signed-off-by: Shelley Chen 
---
M src/mainboard/google/hatch/variants/baseboard/gpio.c
M src/mainboard/google/hatch/variants/dratini/overridetree.cb
M src/mainboard/google/hatch/variants/hatch/overridetree.cb
M src/mainboard/google/hatch/variants/helios/overridetree.cb
M src/mainboard/google/hatch/variants/kohaku/overridetree.cb
5 files changed, 9 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/35903/1

diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 240bb5d..f8df447 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -59,7 +59,7 @@
    /* A22 : FPMCU_PCH_BOOT0 */
    PAD_CFG_GPO(GPP_A22, 0, DEEP),
    /* A23 : FPMCU_PCH_INT_ODL */
-	PAD_CFG_GPI_APIC(GPP_A23, NONE, PLTRST, LEVEL, INVERT),
+	PAD_CFG_GPI_IRQ_WAKE(GPP_A23, NONE, PLTRST, LEVEL, INVERT),

/* B0  : CORE_VID0 */
    PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
diff --git a/src/mainboard/google/hatch/variants/dratini/overridetree.cb b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
index 65649d1..1af822d4 100644
--- a/src/mainboard/google/hatch/variants/dratini/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
@@ -140,7 +140,8 @@
    			register "hid" = "ACPI_DT_NAMESPACE_HID"
    			register "uid" = "1"
    			register "compat_string" = ""google,cros-ec-spi""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
+				register "wake" = "GPE0_DW0_23"
    			device spi 1 on end
    		end # FPMCU
    	end # GSPI #1
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
index df2cc38..bc6aa11 100644
--- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
@@ -171,7 +171,8 @@
    			register "hid" = "ACPI_DT_NAMESPACE_HID"
    			register "uid" = "1"
    			register "compat_string" = ""google,cros-ec-spi""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
+				register "wake" = "GPE0_DW0_23"
    			device spi 1 on end
    		end # FPMCU
    	end # GSPI #1
diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb
index 8ca878d..0902340 100644
--- a/src/mainboard/google/hatch/variants/helios/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb
@@ -180,7 +180,8 @@
    			register "hid" = "ACPI_DT_NAMESPACE_HID"
    			register "uid" = "1"
    			register "compat_string" = ""google,cros-ec-spi""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
+				register "wake" = "GPE0_DW0_23"
    			device spi 1 on end
    		end # FPMCU
    	end # GSPI #1
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index 37914fa..bd60973 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -238,7 +238,8 @@
    			register "hid" = "ACPI_DT_NAMESPACE_HID"
    			register "uid" = "1"
    			register "compat_string" = ""google,cros-ec-spi""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
+				register "wake" = "GPE0_DW0_23"
    			device spi 1 on end
    		end # FPMCU
    	end # GSPI #1

[Paul Fagerburg (Code Review)]

Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35903 )

Change subject: mb/google/hatch: Set FPS as wake source
......................................................................

Patch Set 1:

(2 comments)

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
File src/mainboard/google/hatch/variants/baseboard/gpio.c:

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
PS1, Line 62: LEVEL
Should this be EDGE?

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
File src/mainboard/google/hatch/variants/hatch/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
PS1, Line 174: ACPI_IRQ_WAKE_LEVEL_LOW
Does this (and its copies for the variants) need to be edge-triggered?

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35903 )

Change subject: mb/google/hatch: Set FPS as wake source
......................................................................

Patch Set 1: Code-Review+2

(2 comments)

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
File src/mainboard/google/hatch/variants/baseboard/gpio.c:

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
PS1, Line 62: LEVEL
> Should this be EDGE?

It was a level triggered interrupt before, so this shouldn't change.

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
File src/mainboard/google/hatch/variants/hatch/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
PS1, Line 174: ACPI_IRQ_WAKE_LEVEL_LOW
> Does this (and its copies for the variants) need to be edge-triggered?

It has been a level-triggered interrupt, why would it need to change to edge?

[Paul Fagerburg (Code Review)]

Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35903 )

Change subject: mb/google/hatch: Set FPS as wake source
......................................................................

Patch Set 1:

(2 comments)

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
File src/mainboard/google/hatch/variants/baseboard/gpio.c:

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
PS1, Line 62: LEVEL
> It was a level triggered interrupt before, so this shouldn't change.

OK

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
File src/mainboard/google/hatch/variants/hatch/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/35903/1/src/mainboard/google/hatch/... 
PS1, Line 174: ACPI_IRQ_WAKE_LEVEL_LOW
> It has been a level-triggered interrupt, why would it need to change to edge?

Wasn't sure if we needed to change to edge-triggered since it is becoming a wake-up source.

[Paul Fagerburg (Code Review)]

Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35903 )

Change subject: mb/google/hatch: Set FPS as wake source
......................................................................

Patch Set 1: Code-Review+2

[Shelley Chen (Code Review)]

Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35903 )

Change subject: mb/google/hatch: Set FPS as wake source
......................................................................

mb/google/hatch: Set FPS as wake source

BUG=b:142131099
BRANCH=None
TEST=powerd_dbus_suspend, ensure DUT in S0ix
     touch fp sensor and ensure DUT wakes up in S0

Change-Id: If57094aa1076d79ac0886b71fa5532411bfeb45f
Signed-off-by: Shelley Chen 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35903
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Paul Fagerburg 
---
M src/mainboard/google/hatch/variants/baseboard/gpio.c
M src/mainboard/google/hatch/variants/dratini/overridetree.cb
M src/mainboard/google/hatch/variants/hatch/overridetree.cb
M src/mainboard/google/hatch/variants/helios/overridetree.cb
M src/mainboard/google/hatch/variants/kohaku/overridetree.cb
5 files changed, 9 insertions(+), 5 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved
  Paul Fagerburg: Looks good to me, approved

diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 240bb5d..f8df447 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -59,7 +59,7 @@
    /* A22 : FPMCU_PCH_BOOT0 */
    PAD_CFG_GPO(GPP_A22, 0, DEEP),
    /* A23 : FPMCU_PCH_INT_ODL */
-	PAD_CFG_GPI_APIC(GPP_A23, NONE, PLTRST, LEVEL, INVERT),
+	PAD_CFG_GPI_IRQ_WAKE(GPP_A23, NONE, PLTRST, LEVEL, INVERT),

/* B0  : CORE_VID0 */
    PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
diff --git a/src/mainboard/google/hatch/variants/dratini/overridetree.cb b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
index 65649d1..1af822d4 100644
--- a/src/mainboard/google/hatch/variants/dratini/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
@@ -140,7 +140,8 @@
    			register "hid" = "ACPI_DT_NAMESPACE_HID"
    			register "uid" = "1"
    			register "compat_string" = ""google,cros-ec-spi""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
+				register "wake" = "GPE0_DW0_23"
    			device spi 1 on end
    		end # FPMCU
    	end # GSPI #1
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
index df2cc38..bc6aa11 100644
--- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
@@ -171,7 +171,8 @@
    			register "hid" = "ACPI_DT_NAMESPACE_HID"
    			register "uid" = "1"
    			register "compat_string" = ""google,cros-ec-spi""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
+				register "wake" = "GPE0_DW0_23"
    			device spi 1 on end
    		end # FPMCU
    	end # GSPI #1
diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb
index 8ca878d..0902340 100644
--- a/src/mainboard/google/hatch/variants/helios/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb
@@ -180,7 +180,8 @@
    			register "hid" = "ACPI_DT_NAMESPACE_HID"
    			register "uid" = "1"
    			register "compat_string" = ""google,cros-ec-spi""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
+				register "wake" = "GPE0_DW0_23"
    			device spi 1 on end
    		end # FPMCU
    	end # GSPI #1
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index 37914fa..bd60973 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -238,7 +238,8 @@
    			register "hid" = "ACPI_DT_NAMESPACE_HID"
    			register "uid" = "1"
    			register "compat_string" = ""google,cros-ec-spi""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
+				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
+				register "wake" = "GPE0_DW0_23"
    			device spi 1 on end
    		end # FPMCU
    	end # GSPI #1