[S] Change in coreboot[master]: soc/amd/stoneyridge: use SoC common uart ops

[Matt DeVillier (Code Review)]

Attention is currently required from: Felix Held.

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77093?usp=email )

Change subject: soc/amd/stoneyridge: use SoC common uart ops
......................................................................

soc/amd/stoneyridge: use SoC common uart ops

Define the UARTs as MMIO devices in the chipset devicetrees; drop ACPI
_STA in asl since now handled by common SSDT generator.

TEST=build/boot google/liara, verify console UART still functional.

Change-Id: Ibecafdfa189d9c63a29b63759c5b965d03719009
Signed-off-by: Matt DeVillier 
---
M src/soc/amd/stoneyridge/acpi/mmio.asl
M src/soc/amd/stoneyridge/chipset_cz.cb
M src/soc/amd/stoneyridge/chipset_st.cb
3 files changed, 4 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/77093/1

diff --git a/src/soc/amd/stoneyridge/acpi/mmio.asl b/src/soc/amd/stoneyridge/acpi/mmio.asl
index ef2b4ea..b6f4fc3 100644
--- a/src/soc/amd/stoneyridge/acpi/mmio.asl
+++ b/src/soc/amd/stoneyridge/acpi/mmio.asl
@@ -47,10 +47,6 @@
    	IRQ (Edge, ActiveHigh, Exclusive) { 10 }
    	Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x2000)
    })
-	Method (_STA, 0x0, NotSerialized)
-	{
-		Return (0x0F)
-	}
 }

Device (FUR1) {
@@ -61,10 +57,6 @@
    		IRQ (Edge, ActiveHigh, Exclusive) { 11 }
    		Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x2000)
    })
-	Method (_STA, 0x0, NotSerialized)
-	{
-			Return (0x0F)
-	}
 }

Device (I2CA) {
diff --git a/src/soc/amd/stoneyridge/chipset_cz.cb b/src/soc/amd/stoneyridge/chipset_cz.cb
index a3bd85c..004ff91 100644
--- a/src/soc/amd/stoneyridge/chipset_cz.cb
+++ b/src/soc/amd/stoneyridge/chipset_cz.cb
@@ -43,4 +43,6 @@
    device mmio 0xfedc3000 alias i2c_1 off ops soc_amd_i2c_mmio_ops end
    device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end
    device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end
+	device mmio 0xfedc6000 alias uart_0 off ops amd_uart_mmio_ops end
+	device mmio 0xfedc8000 alias uart_1 off ops amd_uart_mmio_ops end
 end
diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb
index c78da61..34a0384 100644
--- a/src/soc/amd/stoneyridge/chipset_st.cb
+++ b/src/soc/amd/stoneyridge/chipset_st.cb
@@ -37,4 +37,6 @@
    device mmio 0xfedc3000 alias i2c_1 off ops soc_amd_i2c_mmio_ops end
    device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end
    device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end
+	device mmio 0xfedc6000 alias uart_0 off ops amd_uart_mmio_ops end
+	device mmio 0xfedc8000 alias uart_1 off ops amd_uart_mmio_ops end
 end