Change in ...coreboot[master]: arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv field
Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31701 )
Change subject: arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv field ......................................................................
arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv field
Since ACPI v2.c, this field is access_size. Currently, coreboot is using ACPI v3,so we can drop '.resv' field.
Change-Id: I7b3b930861669bb05cdc8e81f6502476a0568fe0 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/31701 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/arch/x86/acpigen.c M src/arch/x86/include/arch/acpi.h M src/cpu/amd/family_10h-family_15h/powernow_acpi.c M src/cpu/intel/common/common_init.c M src/cpu/intel/model_2065x/model_2065x_init.c M src/cpu/intel/model_206ax/model_206ax_init.c M src/mainboard/amd/serengeti_cheetah_fam10/fadt.c M src/mainboard/amd/torpedo/fadt.c M src/mainboard/aopen/dxplplusu/fadt.c M src/mainboard/apple/macbook21/mainboard.c M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/getac/p470/cstates.c M src/mainboard/lenovo/t400/cstates.c M src/mainboard/lenovo/t400/fadt.c M src/mainboard/lenovo/t60/mainboard.c M src/mainboard/lenovo/x200/cstates.c M src/mainboard/lenovo/x200/fadt.c M src/mainboard/lenovo/x201/mainboard.c M src/mainboard/lenovo/x60/mainboard.c M src/mainboard/lenovo/z61t/mainboard.c M src/mainboard/packardbell/ms2290/mainboard.c M src/mainboard/roda/rk9/cstates.c M src/mainboard/roda/rk9/fadt.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/icelake/acpi.c M src/soc/intel/skylake/acpi.c M src/southbridge/amd/sb700/fadt.c M src/southbridge/amd/sb800/fadt.c M src/southbridge/intel/i82371eb/fadt.c M src/southbridge/nvidia/ck804/fadt.c M src/southbridge/nvidia/mcp55/fadt.c 34 files changed, 196 insertions(+), 211 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c index 0eacf05..3f9f994 100644 --- a/src/arch/x86/acpigen.c +++ b/src/arch/x86/acpigen.c @@ -580,14 +580,12 @@ }) */ acpi_addr_t addr = { - .space_id = ACPI_ADDRESS_SPACE_FIXED, - .bit_width = 0, - .bit_offset = 0, - { - .resv = 0 - }, - .addrl = 0, - .addrh = 0, + .space_id = ACPI_ADDRESS_SPACE_FIXED, + .bit_width = 0, + .bit_offset = 0, + .access_size = 0, + .addrl = 0, + .addrh = 0, };
acpigen_write_name("_PTC"); @@ -845,7 +843,7 @@ acpigen_emit_byte(addr->space_id); /* Address Space ID */ acpigen_emit_byte(addr->bit_width); /* Register Bit Width */ acpigen_emit_byte(addr->bit_offset); /* Register Bit Offset */ - acpigen_emit_byte(addr->resv); /* Register Access Size */ + acpigen_emit_byte(addr->access_size); /* Register Access Size */ acpigen_emit_dword(addr->addrl); /* Register Address Low */ acpigen_emit_dword(addr->addrh); /* Register Address High */ } diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index b3a5ce7..63f3045 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -103,10 +103,7 @@ u8 space_id; /* Address space ID */ u8 bit_width; /* Register size in bits */ u8 bit_offset; /* Register bit offset */ - union { - u8 resv; /* Reserved in ACPI 2.0 - 2.0b */ - u8 access_size; /* Access size since ACPI 2.0c */ - }; + u8 access_size; /* Access size since ACPI 2.0c */ u32 addrl; /* Register address, low 32 bits */ u32 addrh; /* Register address, high 32 bits */ } __packed acpi_addr_t; diff --git a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c index 2ce4722..15b6550 100644 --- a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c +++ b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c @@ -114,7 +114,7 @@ cstate.resource.bit_offset = 0; cstate.resource.addrl = rdmsr(MSR_CSTATE_ADDRESS).lo + 1; cstate.resource.addrh = 0; - cstate.resource.resv = 1; + cstate.resource.access_size = 1; } else { cstate.ctype = 2; cstate.latency = 75; @@ -124,7 +124,7 @@ cstate.resource.bit_offset = 0; cstate.resource.addrl = rdmsr(MSR_CSTATE_ADDRESS).lo; cstate.resource.addrh = 0; - cstate.resource.resv = 1; + cstate.resource.access_size = 1; }
acpigen_write_CST_package(&cstate, cstate_count); diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index 321c56c..a568ea1 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -113,9 +113,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = 8, .bit_offset = 0, - { - .access_size = 4 - }, + .access_size = 4, .addrl = 0, .addrh = 0, }; @@ -123,9 +121,7 @@ .space_id = ACPI_ADDRESS_SPACE_MEMORY, .bit_width = 0, .bit_offset = 0, - { - .resv = 0 - }, + .access_size = 0, .addrl = 0, .addrh = 0, }; diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index 240bf50..fd34229 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -49,7 +49,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 2: C1E */ @@ -60,7 +60,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 3: C3 */ @@ -71,7 +71,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 4: C6 */ @@ -82,7 +82,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 5: C7 */ @@ -93,7 +93,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 6: C7S */ @@ -104,7 +104,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { 0 } diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 33ad1e7..e746208 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -53,7 +53,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 2: C1E */ @@ -64,7 +64,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 3: C3 */ @@ -75,7 +75,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 4: C6 */ @@ -86,7 +86,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 5: C7 */ @@ -97,7 +97,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { /* 6: C7S */ @@ -108,7 +108,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - .resv = ACPI_FFIXEDHW_FLAG_HW_COORD, + .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, } }, { 0 } diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/fadt.c b/src/mainboard/amd/serengeti_cheetah_fam10/fadt.c index bbb3104..2067024 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/fadt.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/fadt.c @@ -89,7 +89,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0x0;
@@ -102,56 +102,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pm_base; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 4; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pm_base+4; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 2; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 0; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = 0x0; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pm_base+0x08; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 32; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pm_base+0x20; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 64; fadt->x_gpe1_blk.bit_offset = 16; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = pm_base+0xb0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/mainboard/amd/torpedo/fadt.c b/src/mainboard/amd/torpedo/fadt.c index 37f7cec..9e33c07 100644 --- a/src/mainboard/amd/torpedo/fadt.c +++ b/src/mainboard/amd/torpedo/fadt.c @@ -137,7 +137,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0x0;
@@ -150,14 +150,14 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = ACPI_PM_EVT_BLK; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 4; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
@@ -165,14 +165,14 @@ fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 2; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
@@ -180,7 +180,7 @@ fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 0; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = ACPI_PM2_CNT_BLK; fadt->x_pm2_cnt_blk.addrh = 0x0;
@@ -188,7 +188,7 @@ fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = ACPI_PM_TMR_BLK; fadt->x_pm_tmr_blk.addrh = 0x0;
@@ -196,7 +196,7 @@ fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 32; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; fadt->x_gpe0_blk.addrh = 0x0;
@@ -204,7 +204,7 @@ fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/mainboard/aopen/dxplplusu/fadt.c b/src/mainboard/aopen/dxplplusu/fadt.c index c93733b..adf94e9 100644 --- a/src/mainboard/aopen/dxplplusu/fadt.c +++ b/src/mainboard/aopen/dxplplusu/fadt.c @@ -93,7 +93,7 @@ fadt->reset_reg.space_id = 0; fadt->reset_reg.bit_width = 0; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0x0; fadt->reset_reg.addrh = 0x0;
@@ -106,56 +106,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 0; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = 0x0; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 64; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pmbase + 0x28; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c index 3f4d6e6..f26c676 100644 --- a/src/mainboard/apple/macbook21/mainboard.c +++ b/src/mainboard/apple/macbook21/mainboard.c @@ -36,9 +36,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - { - .resv = 0, - }, + .access_size = 0, .addrl = 0, .addrh = 0, } @@ -51,9 +49,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, - { - .resv = 0, - }, + .access_size = 0, .addrl = 0x10, .addrh = 0, } diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c index e7147fc..6acbaf7 100644 --- a/src/mainboard/emulation/qemu-q35/acpi_tables.c +++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c @@ -103,7 +103,7 @@ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0; fadt->reset_value = 0x06; @@ -117,14 +117,14 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 0; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
@@ -132,42 +132,42 @@ fadt->x_pm1a_cnt_blk.bit_width = 16; /* Upper word is reserved and Linux complains about 32 bit. */ fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 0; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 128; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pmbase + 0x20; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 0; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/mainboard/getac/p470/cstates.c b/src/mainboard/getac/p470/cstates.c index 38b0d30..fe4af04 100644 --- a/src/mainboard/getac/p470/cstates.c +++ b/src/mainboard/getac/p470/cstates.c @@ -19,17 +19,17 @@ { /* ACPI C1 / CPU C1 */ 1, 0x01, 1000, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0, 0 } }, { /* ACPI C2 / CPU C2 */ 2, 0x01, 500, - { ACPI_ADDRESS_SPACE_IO, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } + { ACPI_ADDRESS_SPACE_IO, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } }, { /* ACPI C3 / CPU C2 */ 2, 0x11, 250, - { ACPI_ADDRESS_SPACE_IO, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } + { ACPI_ADDRESS_SPACE_IO, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } }, };
diff --git a/src/mainboard/lenovo/t400/cstates.c b/src/mainboard/lenovo/t400/cstates.c index 175153e..e51accb 100644 --- a/src/mainboard/lenovo/t400/cstates.c +++ b/src/mainboard/lenovo/t400/cstates.c @@ -21,17 +21,17 @@ { /* ACPI C1 / CPU C1 */ 1, 0x01, 1000, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0, 0 } }, { /* ACPI C2 / CPU C2 */ 2, 0x01, 500, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0x10, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0x10, 0 } }, { /* acpi C3 / cpu C3 */ 3, 0x37, 250, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0x20, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0x20, 0 } }, };
diff --git a/src/mainboard/lenovo/t400/fadt.c b/src/mainboard/lenovo/t400/fadt.c index 45c0d74..673791f 100644 --- a/src/mainboard/lenovo/t400/fadt.c +++ b/src/mainboard/lenovo/t400/fadt.c @@ -82,7 +82,7 @@ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0; fadt->reset_value = 0x06; @@ -96,14 +96,14 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 0; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
@@ -111,42 +111,42 @@ fadt->x_pm1a_cnt_blk.bit_width = 16; /* Upper word is reserved and Linux complains about 32 bit. */ fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 0; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 128; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pmbase + 0x20; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 0; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c index 90bdc39..df1f174 100644 --- a/src/mainboard/lenovo/t60/mainboard.c +++ b/src/mainboard/lenovo/t60/mainboard.c @@ -27,9 +27,9 @@ #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
static acpi_cstate_t cst_entries[] = { - { 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } }, - { 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } }, - { 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } }, + { 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } }, + { 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } }, + { 2, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } }, };
int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/lenovo/x200/cstates.c b/src/mainboard/lenovo/x200/cstates.c index 175153e..e51accb 100644 --- a/src/mainboard/lenovo/x200/cstates.c +++ b/src/mainboard/lenovo/x200/cstates.c @@ -21,17 +21,17 @@ { /* ACPI C1 / CPU C1 */ 1, 0x01, 1000, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0, 0 } }, { /* ACPI C2 / CPU C2 */ 2, 0x01, 500, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0x10, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0x10, 0 } }, { /* acpi C3 / cpu C3 */ 3, 0x37, 250, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0x20, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0x20, 0 } }, };
diff --git a/src/mainboard/lenovo/x200/fadt.c b/src/mainboard/lenovo/x200/fadt.c index 45c0d74..673791f 100644 --- a/src/mainboard/lenovo/x200/fadt.c +++ b/src/mainboard/lenovo/x200/fadt.c @@ -82,7 +82,7 @@ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0; fadt->reset_value = 0x06; @@ -96,14 +96,14 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 0; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
@@ -111,42 +111,42 @@ fadt->x_pm1a_cnt_blk.bit_width = 16; /* Upper word is reserved and Linux complains about 32 bit. */ fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 0; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 128; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pmbase + 0x20; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 0; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index 5347429..b8129ad 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -32,9 +32,9 @@ #include <arch/acpigen.h>
static acpi_cstate_t cst_entries[] = { - {1, 1, 1000, {0x7f, 1, 2, {0}, 1, 0}}, - {2, 1, 500, {0x01, 8, 0, {0}, DEFAULT_PMBASE + LV2, 0}}, - {2, 17, 250, {0x01, 8, 0, {0}, DEFAULT_PMBASE + LV3, 0}}, + {1, 1, 1000, {0x7f, 1, 2, 0, 1, 0} }, + {2, 1, 500, {0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0} }, + {2, 17, 250, {0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0} }, };
int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c index 5cf0d26..274a151 100644 --- a/src/mainboard/lenovo/x60/mainboard.c +++ b/src/mainboard/lenovo/x60/mainboard.c @@ -34,9 +34,7 @@ .space_id = ACPI_ADDRESS_SPACE_FIXED, \ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \ - { \ - .resv = 0, \ - }, \ + .access_size = 0, \ .addrl = (((state) << 4) | (sub_state)), \ .addrh = 0, \ } diff --git a/src/mainboard/lenovo/z61t/mainboard.c b/src/mainboard/lenovo/z61t/mainboard.c index c7e7868..6616b4a 100644 --- a/src/mainboard/lenovo/z61t/mainboard.c +++ b/src/mainboard/lenovo/z61t/mainboard.c @@ -27,9 +27,9 @@ #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
static acpi_cstate_t cst_entries[] = { - { 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } }, - { 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } }, - { 3, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } }, + { 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } }, + { 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } }, + { 3, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } }, };
int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index 1fe57d6..701d6a3 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -34,9 +34,9 @@ #include <smbios.h>
static acpi_cstate_t cst_entries[] = { - {1, 1, 1000, {0x7f, 1, 2, {0}, 1, 0}}, - {2, 1, 500, {0x01, 8, 0, {0}, DEFAULT_PMBASE + LV2, 0}}, - {2, 17, 250, {0x01, 8, 0, {0}, DEFAULT_PMBASE + LV3, 0}}, + {1, 1, 1000, {0x7f, 1, 2, 0, 1, 0} }, + {2, 1, 500, {0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0} }, + {2, 17, 250, {0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0} }, };
int get_cst_entries(acpi_cstate_t ** entries) diff --git a/src/mainboard/roda/rk9/cstates.c b/src/mainboard/roda/rk9/cstates.c index 3ce2ed1..0a5f98a 100644 --- a/src/mainboard/roda/rk9/cstates.c +++ b/src/mainboard/roda/rk9/cstates.c @@ -21,12 +21,12 @@ { /* ACPI C1 / CPU C1 */ 1, 0x01, 1000, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0, 0 } }, { /* ACPI C2 / CPU C2 */ 2, 0x01, 500, - { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0x10, 0 } + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, 1, 0x10, 0 } }, };
diff --git a/src/mainboard/roda/rk9/fadt.c b/src/mainboard/roda/rk9/fadt.c index 45c0d74..673791f 100644 --- a/src/mainboard/roda/rk9/fadt.c +++ b/src/mainboard/roda/rk9/fadt.c @@ -82,7 +82,7 @@ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0; fadt->reset_value = 0x06; @@ -96,14 +96,14 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 0; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
@@ -111,42 +111,42 @@ fadt->x_pm1a_cnt_blk.bit_width = 16; /* Upper word is reserved and Linux complains about 32 bit. */ fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 0; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 128; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pmbase + 0x20; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 0; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 60120bd..b2cac4c 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -216,7 +216,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0; fadt->reset_value = 6; @@ -224,56 +224,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase + PM1_STS; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = pmbase + PM2A_CNT_BLK; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; } diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 44f1d3a..b67303e 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -191,7 +191,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0; fadt->reset_value = 6; @@ -199,56 +199,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase + PM1_STS; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = pmbase + PM2A_CNT_BLK; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; } diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 42d31c8..5b737d7 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -271,7 +271,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0; fadt->reset_value = 6; @@ -279,56 +279,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase + PM1_STS; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = pmbase + PM2_CNT; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 0; fadt->x_gpe0_blk.bit_width = 0; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = 0; fadt->x_gpe0_blk.addrh = 0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; } diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index f9f3e96..92a4711 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -179,7 +179,7 @@ fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0; } diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index 0e13d034..0a26ee5 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -177,7 +177,7 @@ fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0; } diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 3ad1e50..3622965 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -290,7 +290,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0; fadt->reset_value = 6; @@ -298,56 +298,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pmbase + PM1_STS; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 0; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 0; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = pmbase + PM2_CNT; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 0; fadt->x_gpe0_blk.bit_width = 0; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = 0; fadt->x_gpe0_blk.addrh = 0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrh = 0x0; } diff --git a/src/southbridge/amd/sb700/fadt.c b/src/southbridge/amd/sb700/fadt.c index d5c1757..723f0dc 100644 --- a/src/southbridge/amd/sb700/fadt.c +++ b/src/southbridge/amd/sb700/fadt.c @@ -90,7 +90,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0x0;
@@ -103,56 +103,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = ACPI_PM_EVT_BLK; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 4; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 2; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = ACPI_PMA_CNT_BLK; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = ACPI_PM_TMR_BLK; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 64; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/southbridge/amd/sb800/fadt.c b/src/southbridge/amd/sb800/fadt.c index ce27981..bb0a070 100644 --- a/src/southbridge/amd/sb800/fadt.c +++ b/src/southbridge/amd/sb800/fadt.c @@ -90,7 +90,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0x0;
@@ -103,56 +103,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = ACPI_PM_EVT_BLK; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 4; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 2; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 0; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = ACPI_PMA_CNT_BLK; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = ACPI_PM_TMR_BLK; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 32; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 0; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 32ae9ff..a05e668 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -150,7 +150,7 @@ fadt->reset_reg.space_id = 0; fadt->reset_reg.bit_width = 0; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0x0; fadt->reset_reg.addrh = 0x0; fadt->reset_value = 0; @@ -163,56 +163,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = fadt->pm1b_evt_blk; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = fadt->pm1b_cnt_blk; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = fadt->gpe1_blk_len * 8; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = fadt->gpe1_blk; fadt->x_gpe1_blk.addrh = 0x0;
diff --git a/src/southbridge/nvidia/ck804/fadt.c b/src/southbridge/nvidia/ck804/fadt.c index ea93789..6a09661 100644 --- a/src/southbridge/nvidia/ck804/fadt.c +++ b/src/southbridge/nvidia/ck804/fadt.c @@ -92,7 +92,7 @@ fadt->reset_reg.space_id = 1; fadt->reset_reg.bit_width = 8; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0x0;
@@ -105,56 +105,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = pm_base; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = 4; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = 0x0; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = pm_base + 4; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = 2; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = 0x0; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = 0; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = 0x0; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = pm_base + 0x08; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 32; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = pm_base + 0x20; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = 64; fadt->x_gpe1_blk.bit_offset = 16; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = pm_base + 0xb0; fadt->x_gpe1_blk.addrh = 0x0; #endif diff --git a/src/southbridge/nvidia/mcp55/fadt.c b/src/southbridge/nvidia/mcp55/fadt.c index 5b00861..4d2d396 100644 --- a/src/southbridge/nvidia/mcp55/fadt.c +++ b/src/southbridge/nvidia/mcp55/fadt.c @@ -100,7 +100,7 @@ fadt->reset_reg.space_id = 0; fadt->reset_reg.bit_width = 0; fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; + fadt->reset_reg.access_size = 0; fadt->reset_reg.addrl = 0x0; fadt->reset_reg.addrh = 0x0;
@@ -113,56 +113,56 @@ fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.access_size = 0; fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk; fadt->x_pm1a_evt_blk.addrh = 0x0;
fadt->x_pm1b_evt_blk.space_id = 1; fadt->x_pm1b_evt_blk.bit_width = fadt->pm1_evt_len * 8; fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.access_size = 0; fadt->x_pm1b_evt_blk.addrl = fadt->pm1b_evt_blk; fadt->x_pm1b_evt_blk.addrh = 0x0;
fadt->x_pm1a_cnt_blk.space_id = 1; fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.access_size = 0; fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk; fadt->x_pm1a_cnt_blk.addrh = 0x0;
fadt->x_pm1b_cnt_blk.space_id = 1; fadt->x_pm1b_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; fadt->x_pm1b_cnt_blk.addrl = fadt->pm1b_cnt_blk; fadt->x_pm1b_cnt_blk.addrh = 0x0;
fadt->x_pm2_cnt_blk.space_id = 1; fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.access_size = 0; fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk; fadt->x_pm2_cnt_blk.addrh = 0x0;
fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.access_size = 0; fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk; fadt->x_pm_tmr_blk.addrh = 0x0;
fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.access_size = 0; fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0;
fadt->x_gpe1_blk.space_id = 1; fadt->x_gpe1_blk.bit_width = fadt->gpe1_blk_len * 8; fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.addrl = fadt->gpe1_blk; fadt->x_gpe1_blk.addrh = 0x0;
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Nico Huber (Code Review)