[XS] Change in coreboot[main]: soc/intel/tigerlake: Change the maximum C state to C8 - coreboot-gerrit

28 Jan 2025


      Attention is currently required from: Intel coreboot Reviewers, Nick Vaccaro, Sean Rhodes, Subrata Banik.
Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86199?usp=email )
The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: soc/intel/tigerlake: Change the maximum C state to C8
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/86199/comment/2b9c4733_9f092880?usp... :
PS1, Line 9: Tigerr
Tiger
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
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Gerrit-Change-Id: I3fe0f5a8f9b52a44d1951037d74df4a244ba602e
Gerrit-Change-Number: 86199
Gerrit-PatchSet: 1
Gerrit-Owner: Sean Rhodes sean@starlabs.systems
Gerrit-Reviewer: Intel coreboot Reviewers intel_coreboot_reviewers@intel.com
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