Attention is currently required from: Jason Glenesk, Mathew King, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50573 )
Change subject: soc/amd/cezanne/acpi: Add MMIO devices ......................................................................
Patch Set 3:
(2 comments)
File src/soc/amd/cezanne/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/50573/comment/8f8dfc8f_f31c43af PS3, Line 17:
APU_I2C4_BASE at 0xfedc6000 is missing. […]
Right, I didn't add it because it's only an I2C slave. We don't want to add it into the ASL since it's not really usable by the OS.
https://review.coreboot.org/c/coreboot/+/50573/comment/12802a43_1c69d3d9 PS3, Line 24: #define APU_EMMC_CONFIG_BASE 0xfedd5800
not sure how supported or broken emmc is on czn. […]
I'm assuming it's the same IP as picasso. I think it's fine to leave it for now. We won't be using it on any of the Google designs, so we can't test it.
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Raul Rangel (Code Review)