Change in coreboot[master]: mb/asus/p8z77-v_lx2: Add CMOS option support

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52344 )

Change subject: mb/asus/p8z77-v_lx2: Add CMOS option support
......................................................................

mb/asus/p8z77-v_lx2: Add CMOS option support

Based on asus/p8z77-m_pro's, with NMI set to disabled by default, and
all available gfx_uma_size values.

Signed-off-by: Bill XIE 
Change-Id: I9582747b3d4782f4b02ddecaab636bdbb1b6f530
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52344
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/asus/p8z77-v_lx2/Kconfig
A src/mainboard/asus/p8z77-v_lx2/cmos.default
A src/mainboard/asus/p8z77-v_lx2/cmos.layout
3 files changed, 94 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/asus/p8z77-v_lx2/Kconfig b/src/mainboard/asus/p8z77-v_lx2/Kconfig
index e084f07..108d61a 100644
--- a/src/mainboard/asus/p8z77-v_lx2/Kconfig
+++ b/src/mainboard/asus/p8z77-v_lx2/Kconfig
@@ -7,6 +7,8 @@
    select BOARD_ROMSIZE_KB_8192
    select HAVE_ACPI_RESUME
    select HAVE_ACPI_TABLES
+	select HAVE_CMOS_DEFAULT
+	select HAVE_OPTION_TABLE
    select INTEL_GMA_HAVE_VBT
    select MAINBOARD_HAS_LIBGFXINIT
    select NORTHBRIDGE_INTEL_SANDYBRIDGE
diff --git a/src/mainboard/asus/p8z77-v_lx2/cmos.default b/src/mainboard/asus/p8z77-v_lx2/cmos.default
new file mode 100644
index 0000000..c7aa620
--- /dev/null
+++ b/src/mainboard/asus/p8z77-v_lx2/cmos.default
@@ -0,0 +1,6 @@
+boot_option=Fallback
+debug_level=Debug
+nmi=Disable
+power_on_after_fail=Disable
+sata_mode=AHCI
+gfx_uma_size=64M
diff --git a/src/mainboard/asus/p8z77-v_lx2/cmos.layout b/src/mainboard/asus/p8z77-v_lx2/cmos.layout
new file mode 100644
index 0000000..0f9de5e
--- /dev/null
+++ b/src/mainboard/asus/p8z77-v_lx2/cmos.layout
@@ -0,0 +1,86 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+# -----------------------------------------------------------------
+entries
+
+# -----------------------------------------------------------------
+0	120	r	0	reserved_memory
+
+# -----------------------------------------------------------------
+# RTC_BOOT_BYTE (coreboot hardcoded)
+384	1	e	2	boot_option
+388	4	h	0	reboot_counter
+
+# -----------------------------------------------------------------
+# coreboot config options: console
+395	4	e	3	debug_level
+
+# coreboot config options: southbridge
+408	1	e	1	nmi
+
+409	2	e	4	power_on_after_fail
+411	2	e	5	sata_mode
+
+# coreboot config options: northbridge
+416	5	e	6	gfx_uma_size
+
+# coreboot config options: check sums
+984	16	h	0	check_sum
+
+# -----------------------------------------------------------------
+
+enumerations
+#ID	value	text
+
+# Generic on/off enum
+1	0	Disable
+1	1	Enable
+
+# boot_option
+2	0	Fallback
+2	1	Normal
+
+# debug_level
+3	0	Emergency
+3	1	Alert
+3	2	Critical
+3	3	Error
+3	4	Warning
+3	5	Notice
+3	6	Info
+3	7	Debug
+3	8	Spew
+
+# power_on_after_fail
+4	0	Disable
+4	1	Enable
+4	2	Keep
+
+# sata_mode
+5	0	AHCI
+5	1	Compatible
+5	2	Legacy
+
+# gfx_uma_size (Intel IGP Video RAM size)
+6	0	32M
+6	1	64M
+6	2	96M
+6	3	128M
+6	4	160M
+6	5	192M
+6	6	224M
+6	7	256M
+6	8	288M
+6	9	320M
+6	10	352M
+6	11	384M
+6	12	416M
+6	13	448M
+6	14	480M
+6	15	512M
+6	16	1024M
+
+# -----------------------------------------------------------------
+checksums
+
+checksum 392 423 984