[M] Change in coreboot[master]: soc/amd/common: Initialize STB Spill-to-DRAM

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Martin L Roth.

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68927 )

Change subject: soc/amd/common: Initialize STB Spill-to-DRAM
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Patch Set 2:

(1 comment)

File src/soc/amd/common/block/smu/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/68927/comment/5ce575d0_c6ae71e1 
PS2, Line 2: bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_SMU) += smu.c
           : romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_SMU) += smu.c
           : ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_SMU) += smu.c
Is there any reason why SMU communication was supported earlier only from SMI? Now that we are sending message to SMU from ramstage are there any possibilities of race condition?