Attention is currently required from: Damien Zammit, Patrick Rudolph. Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51872 )
Change subject: nb/intel/x4x: Correct sync DLL phase search ......................................................................
nb/intel/x4x: Correct sync DLL phase search
Bit 4 needs to be set then polled for after changing sync DLL taps.
Change-Id: I61b73998dec84710eec0d2561a6f4d88068e3373 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/x4x/raminit_ddr23.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/51872/1
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 2389b5f..1bfeaad 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -862,7 +862,7 @@ i++; for (; i < 16; i++) { MCHBAR8_AND_OR(0x1c8, ~0x1f, i); - MCHBAR8_OR(0x180, 0x4); + MCHBAR8_OR(0x180, 0x10); while (MCHBAR8(0x180) & 0x10) ; if (MCHBAR32(0x184) == 0) {