Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73836 )
Change subject: soc/intel/glk: Fix programming temporary MTRR ......................................................................
soc/intel/glk: Fix programming temporary MTRR
Programming MTRR happens later in the CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT. fast_spi_cache_bios_region() assumes an existing MTRR solution from x86_setup_mtrrs_with_detect().
This fixes a problem introduced by 829e8e6 "soc/intel: Use common codeflow for MP init".
Change-Id: I9b6130cf76317440ebe7a7a53e460e2b658d198e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/apollolake/cpu.c 1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/73836/1
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index fec2607..a5b8ef3 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -268,6 +268,10 @@ /* TODO: Handle mp_init_with_smm failure? */ mp_init_with_smm(cpu_bus, &mp_ops);
+ /* MTRR setup happens later, so we're done here. */ + if (CONFIG(SOC_INTEL_COMMON_BLOCK_CPU_MPINIT)) + return; + /* Temporarily cache the memory-mapped boot media. */ if (CONFIG(BOOT_DEVICE_MEMORY_MAPPED) && CONFIG(BOOT_DEVICE_SPI_FLASH))