Attention is currently required from: Raul Rangel, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer.
Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 )
Change subject: mb/google/myst: Enable PCIe devices in devicetree ......................................................................
Patch Set 13:
(2 comments)
File src/mainboard/google/myst/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/74112/comment/0bed68f2_1780ce19 PS8, Line 43: device domain 0 on
Do we need `device ref iommu on end` so we can access these devices through the IOMMU?
Yea, good catch. Covered in https://review.coreboot.org/c/coreboot/+/74177
https://review.coreboot.org/c/coreboot/+/74112/comment/0be9015f_416b7dcb PS8, Line 52: device ref gpp_bridge_2_4 on end # NVMe
I'm not an expert here. Why are these `bridge_2_1`, `bridge_2_2`, etc. […]
These are aliases set by the SoC(https://source.chromium.org/chromium/chromiumos/third_party/coreboot/+/chrom...), and are referenced such that the first number is the PCI device and the second is the lane
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Jon Murphy (Code Review)