[XS] Change in coreboot[main]: soc/intel/common/block/power_limit: Disable RAPL via MSR completely - coreboot-gerrit

7 Jan 2025


      Attention is currently required from: Johannes Hahn, Uwe Poeche.
Werner Zeh has posted comments on this change by Johannes Hahn. ( https://review.coreboot.org/c/coreboot/+/85606?usp=email )
Change subject: soc/intel/common/block/power_limit: Disable RAPL via MSR completely
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Patch Set 6: Code-Review+2
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
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Gerrit-Change-Id: I8272339a991667d5ba177f4755ec40e1961d729e
Gerrit-Change-Number: 85606
Gerrit-PatchSet: 6
Gerrit-Owner: Johannes Hahn johannes-hahn@siemens.com
Gerrit-Reviewer: Mario Scheithauer mario.scheithauer@siemens.com
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Gerrit-Attention: Uwe Poeche uwe.poeche@siemens.com
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Gerrit-Comment-Date: Tue, 07 Jan 2025 06:56:55 +0000
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