Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31041
Change subject: mb/*/*/devicetree.cb: Move the ioapic device out of the PCI domain ......................................................................
mb/*/*/devicetree.cb: Move the ioapic device out of the PCI domain
While the ioapic is physically on the southbridge chip, it is not visible in the topology.
This fixes spurious lines "child IOAPIC: 02 not a PCI device" and IOAPIC as leftover device.
Change-Id: Id8010c84c45f0859508e7564c0eaa501904b7043 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/t400/devicetree.cb M src/mainboard/lenovo/x200/devicetree.cb M src/mainboard/roda/rk9/devicetree.cb 3 files changed, 25 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/31041/1
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb index 5945869..327104d 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -22,6 +22,15 @@ end end
+ chip drivers/generic/ioapic + register "have_isa_interrupts" = "1" + register "irq_on_fsb" = "1" + register "enable_virtual_wire" = "1" + register "base" = "(void *)0xfec00000" + device ioapic 2 on end + end + + register "pci_mmio_size" = "2048"
device domain 0 on @@ -76,14 +85,6 @@ register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 } }" register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
- chip drivers/generic/ioapic - register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" - register "enable_virtual_wire" = "1" - register "base" = "(void *)0xfec00000" - device ioapic 2 on end - end - device pci 19.0 on end # LAN device pci 1a.0 on # UHCI subsystemid 0x17aa 0x20f0 diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb index b74f25a..49d619f 100644 --- a/src/mainboard/lenovo/x200/devicetree.cb +++ b/src/mainboard/lenovo/x200/devicetree.cb @@ -27,6 +27,14 @@ end end
+ chip drivers/generic/ioapic + register "have_isa_interrupts" = "1" + register "irq_on_fsb" = "1" + register "enable_virtual_wire" = "1" + register "base" = "(void *)0xfec00000" + device ioapic 2 on end + end + register "pci_mmio_size" = "2048"
device domain 0 on @@ -80,14 +88,6 @@ register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 } }" register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
- chip drivers/generic/ioapic - register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" - register "enable_virtual_wire" = "1" - register "base" = "(void *)0xfec00000" - device ioapic 2 on end - end - device pci 19.0 on end # LAN device pci 1a.0 on # UHCI subsystemid 0x17aa 0x20f0 diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb index 690c2a5..535e476 100644 --- a/src/mainboard/roda/rk9/devicetree.cb +++ b/src/mainboard/roda/rk9/devicetree.cb @@ -19,6 +19,14 @@ end end
+ chip drivers/generic/ioapic + register "have_isa_interrupts" = "1" + register "irq_on_fsb" = "1" + register "enable_virtual_wire" = "1" + register "base" = "(void *)0xfec00000" + device ioapic 2 on end + end + register "pci_mmio_size" = "2048"
device domain 0 on @@ -67,14 +75,6 @@ # Maybe we should set less for Mini PCIe. register "pcie_power_limits" = "{ { 10, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 } }"
- chip drivers/generic/ioapic - register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" - register "enable_virtual_wire" = "1" - register "base" = "(void *)0xfec00000" - device ioapic 2 on end - end - device pci 19.0 off end # LAN device pci 1a.0 on # UHCI ioapic_irq 2 INTA 0x10
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31041 )
Change subject: mb/*/*/devicetree.cb: Move the ioapic device out of the PCI domain ......................................................................
Patch Set 1: Code-Review+2
Does the log still indicate that the IOAPIC driver is run?
Hello Alexander Couzens, Patrick Rudolph, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31041
to look at the new patch set (#2).
Change subject: mb/*/*/devicetree.cb: Move the ioapic device under the LPC bridge ......................................................................
mb/*/*/devicetree.cb: Move the ioapic device under the LPC bridge
This fixes spurious lines "child IOAPIC: 02 not a PCI device" and IOAPIC as leftover device.
Change-Id: Id8010c84c45f0859508e7564c0eaa501904b7043 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/t400/devicetree.cb M src/mainboard/lenovo/x200/devicetree.cb M src/mainboard/roda/rk9/devicetree.cb 3 files changed, 26 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/31041/2
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31041 )
Change subject: mb/*/*/devicetree.cb: Move the ioapic device under the LPC bridge ......................................................................
Patch Set 2:
Patch Set 1: Code-Review+2
Does the log still indicate that the IOAPIC driver is run?
It does at least with the latest iteration that places it under the LPC bridge.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31041 )
Change subject: mb/*/*/devicetree.cb: Move the ioapic device under the LPC bridge ......................................................................
Patch Set 2: Code-Review+2
Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31041 )
Change subject: mb/*/*/devicetree.cb: Move the ioapic device under the LPC bridge ......................................................................
mb/*/*/devicetree.cb: Move the ioapic device under the LPC bridge
This fixes spurious lines "child IOAPIC: 02 not a PCI device" and IOAPIC as leftover device.
Change-Id: Id8010c84c45f0859508e7564c0eaa501904b7043 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/31041 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/mainboard/lenovo/t400/devicetree.cb M src/mainboard/lenovo/x200/devicetree.cb M src/mainboard/roda/rk9/devicetree.cb 3 files changed, 26 insertions(+), 24 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb index 5945869..4e88e27 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -76,14 +76,6 @@ register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 } }" register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
- chip drivers/generic/ioapic - register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" - register "enable_virtual_wire" = "1" - register "base" = "(void *)0xfec00000" - device ioapic 2 on end - end - device pci 19.0 on end # LAN device pci 1a.0 on # UHCI subsystemid 0x17aa 0x20f0 @@ -141,6 +133,15 @@ end device pci 1f.0 on # LPC bridge subsystemid 0x17aa 0x20f5 + + chip drivers/generic/ioapic + register "have_isa_interrupts" = "1" + register "irq_on_fsb" = "1" + register "enable_virtual_wire" = "1" + register "base" = "(void *)0xfec00000" + device ioapic 2 on end + end + chip ec/lenovo/pmh7 device pnp ff.1 on # dummy end diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb index b74f25a..d800e4f 100644 --- a/src/mainboard/lenovo/x200/devicetree.cb +++ b/src/mainboard/lenovo/x200/devicetree.cb @@ -80,14 +80,6 @@ register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 } }" register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
- chip drivers/generic/ioapic - register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" - register "enable_virtual_wire" = "1" - register "base" = "(void *)0xfec00000" - device ioapic 2 on end - end - device pci 19.0 on end # LAN device pci 1a.0 on # UHCI subsystemid 0x17aa 0x20f0 @@ -145,6 +137,15 @@ end device pci 1f.0 on # LPC bridge subsystemid 0x17aa 0x20f5 + + chip drivers/generic/ioapic + register "have_isa_interrupts" = "1" + register "irq_on_fsb" = "1" + register "enable_virtual_wire" = "1" + register "base" = "(void *)0xfec00000" + device ioapic 2 on end + end + chip ec/lenovo/pmh7 device pnp ff.1 on # dummy end diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb index 690c2a5..4300171 100644 --- a/src/mainboard/roda/rk9/devicetree.cb +++ b/src/mainboard/roda/rk9/devicetree.cb @@ -67,14 +67,6 @@ # Maybe we should set less for Mini PCIe. register "pcie_power_limits" = "{ { 10, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 10, 0 }, { 0, 0 } }"
- chip drivers/generic/ioapic - register "have_isa_interrupts" = "1" - register "irq_on_fsb" = "1" - register "enable_virtual_wire" = "1" - register "base" = "(void *)0xfec00000" - device ioapic 2 on end - end - device pci 19.0 off end # LAN device pci 1a.0 on # UHCI ioapic_irq 2 INTA 0x10 @@ -126,6 +118,14 @@ device pci 03.4 off end # unconnected SD-Card end device pci 1f.0 on # LPC bridge + chip drivers/generic/ioapic + register "have_isa_interrupts" = "1" + register "irq_on_fsb" = "1" + register "enable_virtual_wire" = "1" + register "base" = "(void *)0xfec00000" + device ioapic 2 on end + end + chip superio/smsc/lpc47n227 device pnp 2e.1 on # Parallel port io 0x60 = 0x378