Change in coreboot[master]: mainboard/google/soraka: Add stop gpio control to touchscreen device

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/21250

Change subject: mainboard/google/soraka: Add stop gpio control to touchscreen device
......................................................................

mainboard/google/soraka: Add stop gpio control to touchscreen device

BUG=b:64987428
TEST=Verified that touchscreen works on boot-up and after
suspend/resume. No power leakage via stop gpio in suspended state.

Change-Id: Ia260eb444081dbe1646c90e82c2725661e7306bc
Signed-off-by: Furquan Shaikh 
---
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
M src/mainboard/google/poppy/variants/soraka/gpio.c
2 files changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/21250/1

diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index 98e63fa..b39092b 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -283,6 +283,7 @@
    			register "generic.reset_delay_ms" = "110"
    			register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
    			register "generic.enable_delay_ms" = "1"
+				register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E11)"
    			register "generic.has_power_resource" = "1"
    			register "generic.disable_gpio_export_in_crs" = "1"
    			register "hid_desc_reg_offset" = "0x1"
diff --git a/src/mainboard/google/poppy/variants/soraka/gpio.c b/src/mainboard/google/poppy/variants/soraka/gpio.c
index 6e0a54f..6f7a3e7 100644
--- a/src/mainboard/google/poppy/variants/soraka/gpio.c
+++ b/src/mainboard/google/poppy/variants/soraka/gpio.c
@@ -248,7 +248,7 @@
    /* E10 : USB2_OC1# ==> USB_C1_OC_ODL */
    PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
    /* E11 : USB2_OC2# ==> TOUCHSCREEN_STOP_L */
-	PAD_CFG_GPO(GPP_E11, 1, DEEP),
+	PAD_CFG_GPO(GPP_E11, 0, DEEP),
    /* E12 : USB2_OC3# ==> USB2_OC3_L */
    PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
    /* E13 : DDPB_HPD0 ==> USB_C0_DP_HPD */