New patch to review for coreboot: roda/rk9: Removed #include early_serial.c from romstage
Antonello Dettori (dev@dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13925
-gerrit
commit 645a60632dc90bb5834eb0c5ba2a9eb4d6691920 Author: Antonello Dettori dev@dettori.io Date: Mon Mar 7 01:59:48 2016 +0000
roda/rk9: Removed #include early_serial.c from romstage
Remove dependency on early_serial.c and instead use the Super I/O's header to access the functions needed. Also re-organized some of the superio code in order to succesfully compile the rom.
Change-Id: I85a6f1352ae3b91c3c98e4d3fa0b90b87e02babc Signed-off-by: Antonello Dettori dev@dettori.io --- src/mainboard/roda/rk9/romstage.c | 2 +- src/superio/smsc/lpc47n227/Makefile.inc | 1 + src/superio/smsc/lpc47n227/early_serial.c | 6 +++--- src/superio/smsc/lpc47n227/lpc47n227.h | 5 +++++ src/superio/smsc/lpc47n227/superio.c | 26 ++++++++------------------ 5 files changed, 18 insertions(+), 22 deletions(-)
diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c index e055be9..ca38426 100644 --- a/src/mainboard/roda/rk9/romstage.c +++ b/src/mainboard/roda/rk9/romstage.c @@ -29,7 +29,7 @@ #include <console/console.h> #include <southbridge/intel/i82801ix/i82801ix.h> #include <northbridge/intel/gm45/gm45.h> -#include <superio/smsc/lpc47n227/early_serial.c> +#include <superio/smsc/lpc47n227/lpc47n227.h>
#define LPC_DEV PCI_DEV(0, 0x1f, 0) #define SERIAL_DEV PNP_DEV(0x2e, LPC47N227_SP1) diff --git a/src/superio/smsc/lpc47n227/Makefile.inc b/src/superio/smsc/lpc47n227/Makefile.inc index 83f1953..71abe9e 100644 --- a/src/superio/smsc/lpc47n227/Makefile.inc +++ b/src/superio/smsc/lpc47n227/Makefile.inc @@ -13,4 +13,5 @@ ## GNU General Public License for more details. ##
+romstage-$(CONFIG_SUPERIO_SMSC_LPC47N227) += early_serial.c ramstage-$(CONFIG_SUPERIO_SMSC_LPC47N227) += superio.c diff --git a/src/superio/smsc/lpc47n227/early_serial.c b/src/superio/smsc/lpc47n227/early_serial.c index f646792..4ae1fb7 100644 --- a/src/superio/smsc/lpc47n227/early_serial.c +++ b/src/superio/smsc/lpc47n227/early_serial.c @@ -19,13 +19,13 @@ #include <arch/io.h> #include "lpc47n227.h"
-static void pnp_enter_conf_state(pnp_devfn_t dev) +void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0x55, port); }
-static void pnp_exit_conf_state(pnp_devfn_t dev) +void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(0xaa, port); @@ -107,7 +107,7 @@ static void lpc47n227_pnp_set_enable(pnp_devfn_t dev, int enable) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Processor I/O port address to assign to this serial device. */ -static void lpc47n227_enable_serial(pnp_devfn_t dev, u16 iobase) +void lpc47n227_enable_serial(pnp_devfn_t dev, u16 iobase) { /* * NOTE: Cannot use pnp_set_XXX() here because they assume chip diff --git a/src/superio/smsc/lpc47n227/lpc47n227.h b/src/superio/smsc/lpc47n227/lpc47n227.h index b08f5e0..d629a67 100644 --- a/src/superio/smsc/lpc47n227/lpc47n227.h +++ b/src/superio/smsc/lpc47n227/lpc47n227.h @@ -28,4 +28,9 @@
#define LPC47N227_MAX_CONFIG_REGISTER 0x39
+void pnp_enter_conf_state(pnp_devfn_t dev); +void pnp_exit_conf_state(pnp_devfn_t dev); + +void lpc47n227_enable_serial(pnp_devfn_t dev, u16 iobase); + #endif diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c index 787aeab..af4c7ef 100644 --- a/src/superio/smsc/lpc47n227/superio.c +++ b/src/superio/smsc/lpc47n227/superio.c @@ -25,6 +25,8 @@ #include <assert.h> #include <stdlib.h> #include <pc80/keyboard.h> +#include <superio/conf_mode.h> + #include "lpc47n227.h"
/* Forward declarations. */ @@ -38,8 +40,6 @@ void lpc47n227_pnp_set_iobase(struct device *dev, u16 iobase); void lpc47n227_pnp_set_drq(struct device *dev, u8 drq); void lpc47n227_pnp_set_irq(struct device *dev, u8 irq); void lpc47n227_pnp_set_enable(struct device *dev, int enable); -static void pnp_enter_conf_state(struct device *dev); -static void pnp_exit_conf_state(struct device *dev);
struct chip_operations superio_smsc_lpc47n227_ops = { CHIP_NAME("SMSC LPC47N227 Super I/O") @@ -86,10 +86,10 @@ void lpc47n227_pnp_set_resources(struct device *dev) { struct resource *res;
- pnp_enter_conf_state(dev); + pnp_enter_conf_mode_55(dev); for (res = dev->resource_list; res; res = res->next) lpc47n227_pnp_set_resource(dev, res); - pnp_exit_conf_state(dev); + pnp_exit_conf_mode_aa(dev); }
/* @@ -98,9 +98,9 @@ void lpc47n227_pnp_set_resources(struct device *dev) */ void lpc47n227_pnp_enable_resources(struct device *dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_mode_55(dev); lpc47n227_pnp_set_enable(dev, 1); - pnp_exit_conf_state(dev); + pnp_exit_conf_mode_aa(dev); }
/* @@ -109,9 +109,9 @@ void lpc47n227_pnp_enable_resources(struct device *dev) */ void lpc47n227_pnp_enable(struct device *dev) { - pnp_enter_conf_state(dev); + pnp_enter_conf_mode_55(dev); lpc47n227_pnp_set_enable(dev, !!dev->enabled); - pnp_exit_conf_state(dev); + pnp_exit_conf_mode_aa(dev); }
/** @@ -271,13 +271,3 @@ void lpc47n227_pnp_set_enable(struct device *dev, int enable) } pnp_write_config(dev, power_register, new_power); } - -static void pnp_enter_conf_state(struct device *dev) -{ - outb(0x55, dev->path.pnp.port); -} - -static void pnp_exit_conf_state(struct device *dev) -{ - outb(0xaa, dev->path.pnp.port); -}
-
Antonello Dettori