[L] Change in coreboot[main]: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151)

[Felix Singer (Code Review)]

Attention is currently required from: Alexander Couzens, Angel Pons, Nicholas Chin, Paul Menzel.

Felix Singer has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/74187?usp=email )

Change subject: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151)
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Patch Set 8: Code-Review+1

(5 comments)

File src/mainboard/lenovo/m900/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/74187/comment/2acfd89e_e97c975b?usp... :
PS8, Line 42: 			# FSP Configuration
Remove comment, seems superfluous.

File src/mainboard/lenovo/m900/dsdt.asl:

https://review.coreboot.org/c/coreboot/+/74187/comment/495f8ee9_5cd9c7e1?usp... :
PS8, Line 16: 	// global NVS and variables
Remove comment, seems superfluous.

https://review.coreboot.org/c/coreboot/+/74187/comment/c2c4f63d_3b84ba98?usp... :
PS8, Line 19: 	// CPU
Remove comment, seems superfluous.

https://review.coreboot.org/c/coreboot/+/74187/comment/f3d95ba6_b25a0d95?usp... :
PS8, Line 22: 	Scope (_SB) {
            : 		
`Device (_SB.PCI0)`

File src/mainboard/lenovo/m900/ramstage.c:

https://review.coreboot.org/c/coreboot/+/74187/comment/b76c639d_0cc710ae?usp... :
PS8, Line 8: 	/* Configure pads prior to SiliconInit() in case there's any
           : 	 * dependencies during hardware initialization. */
           : 	g
We usually don't configure GPIOs prior to FSP-S anymore, since various FSPs reconfigured them later causing issues. Please have a look at clevo/cml-u/ramstage.c how it's done there.