the following patch was just integrated into master: commit 90d12351fd5c3626edd283aafe20b2a427f9d344 Author: Ionela Voinescu ionela.voinescu@imgtec.com Date: Wed Jul 15 12:10:05 2015 +0100
mainboard/google/urara: change SYS PLL to 700MHz
This requires changes the interface that sets up the system PLL to support a given reference devider value and given feedback value. Also, this requires a change in the dividers used for UART, USB, I2C setup.
Change-Id: I98cf7c655dbb3e95b8fcee3c7f468122021c70b5 Signed-off-by: Ionela Voinescu ionela.voinescu@imgtec.com Reviewed-on: https://review.coreboot.org/12765 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org
See https://review.coreboot.org/12765 for details.
-gerrit