Change in coreboot[master]: soc/intel/skylake: Move pmc_set_disb() to pmutil.c

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52463 )

Change subject: soc/intel/skylake: Move pmc_set_disb() to pmutil.c
......................................................................

soc/intel/skylake: Move pmc_set_disb() to pmutil.c

To drop bad __SIMPLE_DEVICE__ usage and for consistency with newer
platforms, move pmc_set_disb() to pmutil.c and adapt it accordingly.

Change-Id: I1a137b5b3120c350a04273567b9cb18c9a42a543
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52463
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Michael Niewöhner 
---
M src/soc/intel/skylake/pmc.c
M src/soc/intel/skylake/pmutil.c
2 files changed, 14 insertions(+), 18 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved
  Michael Niewöhner: Looks good to me, approved

diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index 14e9d4c..c70710f 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -14,24 +14,6 @@

#include "chip.h"

-void pmc_set_disb(void)
-{
-	/* Set the DISB after DRAM init */
-	u32 disb_val;
-#if defined(__SIMPLE_DEVICE__)
-	pci_devfn_t dev = PCH_DEV_PMC;
-#else
-	struct device *dev = PCH_DEV_PMC;
-#endif
-
-	disb_val = pci_read_config32(dev, GEN_PMCON_A);
-	disb_val |= DISB;
-
-	/* Don't clear bits that are write-1-to-clear */
-	disb_val &= ~(GBL_RST_STS | MS4V);
-	pci_write_config32(dev, GEN_PMCON_A, disb_val);
-}
-
 /*
  * Set which power state system will be after reapplying
  * the power (from G3 State)
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index 115a9e5..35862c2 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -113,6 +113,20 @@
    return gpe_sts_bits;
 }

+void pmc_set_disb(void)
+{
+	/* Set the DISB after DRAM init */
+	u32 disb_val;
+	const pci_devfn_t dev = PCH_DEV_PMC;
+
+	disb_val = pci_read_config32(dev, GEN_PMCON_A);
+	disb_val |= DISB;
+
+	/* Don't clear bits that are write-1-to-clear */
+	disb_val &= ~(GBL_RST_STS | MS4V);
+	pci_write_config32(dev, GEN_PMCON_A, disb_val);
+}
+
 uint8_t *pmc_mmio_regs(void)
 {
    uint32_t reg32;